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[null,"1.","Record Nr.",null,"UNINA990004641400403321"]
[null,null,"Autore",null,"Fradeletto, Antonio <1858-1930>"]
[null,null,"Titolo",null,"L'arte nella vita / Antonio Fradeletto"]
[null,null,"Pubbl/distr/stampa",null,"Bari : Laterza, 1929"]
[null,null,"Descrizione fisica",null,"98 p. ; 21 cm"]
[null,null,"Collana",null,"Biblioteca di cultura moderna ; 173"]
[null,null,"Disciplina",null,"700.103"]
[null,null,"Locazione",null,"NAP03"]
[null,null,"Collocazione",null,"700.103 FRA 1"]
[null,null,"Lingua di pubblicazione",null,"Italiano"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,"2.","Record Nr.",null,"UNISA996465383803316"]
[null,null,"Titolo",null,"Automated Technology for Verification and Analysis [[electronic resource] ] : 7th International Symposium, ATVA 2009, Macao, China, October 14-16, 2009, Proceedings / / edited by Zhiming Liu, Anders P. Ravn"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2009"]
[null,null,"ISBN",null,"3-642-04761-0"]
[null,null,"Edizione",null,"[1st ed. 2009.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XI, 414 p.)"]
[null,null,"Collana",null,"Programming and Software Engineering ; ; 5799"]
[null,null,"Classificazione",null,"DAT 286f"]
[{"$nulls":4},"DAT 325f"]
[{"$nulls":4},"DAT 704f"]
[{"$nulls":4},"SS 4800"]
[null,null,"Disciplina",null,"004n/a"]
[null,null,"Soggetti",null,"Computers"]
[{"$nulls":4},"Computer programming"]
[{"$nulls":4},"Programming languages (Electronic computers)"]
[{"$nulls":4},"Computer logic"]
[{"$nulls":4},"Mathematical logic"]
[{"$nulls":4},"Algorithms"]
[{"$nulls":4},"Theory of Computation"]
[{"$nulls":4},"Programming Techniques"]
[{"$nulls":4},"Programming Languages, Compilers, Interpreters"]
[{"$nulls":4},"Logics and Meanings of Programs"]
[{"$nulls":4},"Mathematical Logic and Formal Languages"]
[{"$nulls":4},"Algorithm Analysis and Problem Complexity"]
[{"$nulls":4},"Kongress."]
[{"$nulls":4},"Macao (2009)"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Invited Talks -- Verifying VLSI Circuits -- 3-Valued Abstraction for (Bounded) Model Checking -- Local Search in Model Checking -- State Space Reduction -- Exploring the Scope for Partial Order Reduction -- State Space Reduction of Linear Processes Using Control Flow Reconstruction -- A Data Symmetry Reduction Technique for "]
[{"$nulls":4},"Temporal-epistemic Logic -- Tools -- TAPAAL: Editor, Simulator and Verifier of Timed-Arc Petri Nets -- CLAN: A Tool for Contract Analysis and Conflict Discovery -- UnitCheck: Unit Testing and Model Checking Combined -- Probabilistic Systems -- LTL Model Checking of Time-Inhomogeneous Markov Chains -- Statistical Model Checking Using Perfect Simulation -- Quantitative Analysis under Fairness Constraints -- A Decompositional Proof Scheme for Automated Convergence Proofs of Stochastic Hybrid Systems -- Medley -- Memory Usage Verification Using Hip/Sleek -- Solving Parity Games in Practice -- Automated Analysis of Data-Dependent Programs with Dynamic Memory -- Temporal Logic I -- On-the-fly Emptiness Check of Transition-Based Streett Automata -- On Minimal Odd Rankings for Büchi Complementation -- Specification Languages for Stutter-Invariant Regular Properties -- Abstraction and Refinement -- Incremental False Path Elimination for Static Software Analysis -- A Framework for Compositional Verification of Multi-valued Systems via Abstraction-Refinement -- Don’t Know for Multi-valued Systems -- Logahedra: A New Weakly Relational Domain -- Fault Tolerant Systems -- Synthesis of Fault-Tolerant Distributed Systems -- Formal Verification for High-Assurance Behavioral Synthesis -- Dynamic Observers for the Synthesis of Opaque Systems -- Temporal Logic II -- Symbolic CTL Model Checking of Asynchronous Systems Using Constrained Saturation -- LTL Model Checking for Recursive Programs -- On Detecting Regular Predicates in Distributed Systems."]
[null,null,null,"Sommario/riassunto","This book constitutes the proceedings of the 7th International Symposium on Automated Technology for Verification and Analysis, ATVA 2009, held in Macao, China, in October 2009. The 23 regular papers and 3 took papers presented together with 3 invited talks, were carefully reviewed and selected from 74 research papers and 10 tool papers submissions. The papers are organized in topical sections on state space reduction, tools, probabilistic systems, medley, temporal logic, abstraction and refinement, and fault tolerant systems."]