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[null,null,"Titolo",null,"Hardware and Software: Verification and Testing [[electronic resource] ] : 7th International Haifa Verification Conference, HVC 2011, Haifa, Israel, December 6-8, 2011, Revised Selected Papers / / edited by Kerstin Eder, João Lourenҫo, Onn Shehory"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2012"]
[null,null,"ISBN",null,"3-642-34188-8"]
[null,null,"Edizione",null,"[1st ed. 2012.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XII, 263 p. 95 illus.)"]
[null,null,"Collana",null,"Programming and Software Engineering ; ; 7261"]
[null,null,"Disciplina",null,"005.14"]
[null,null,"Soggetti",null,"Software engineering"]
[{"$nulls":4},"Programming languages (Electronic computers)"]
[{"$nulls":4},"Computer logic"]
[{"$nulls":4},"Artificial intelligence"]
[{"$nulls":4},"Software Engineering"]
[{"$nulls":4},"Programming Languages, Compilers, Interpreters"]
[{"$nulls":4},"Logics and Meanings of Programs"]
[{"$nulls":4},"Artificial Intelligence"]
[{"$nulls":4},"Conference proceedings."]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,"Nota di contenuto",null,"Preprocessing and Inprocessing Techniques in SAT -- Pioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify "]
[{"$nulls":4},"System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing.  -- ioneering the Future of Verification: A Spiral of Technological and Business Innovation -- Automated Detection and Repair of Concurrency Bugs -- Verification Challenges of Workload Optimized Hardware Systems -- Synthesis with Clairvoyance -- Generalized Reactivity(1) Synthesis without a Monolithic Strategy -- IIS-Guided DFS for Efficient Bounded Reachability Analysis of Linear Hybrid Automata -- Cube and Conquer: Guiding CDCL SAT Solvers by Lookaheads.Implicative Simultaneous Satisfiability and Applications -- Liveness vs Safety – A Practical Viewpoint -- Predicting Serializability Violations: SMT-Based Search vs. DPOR-Based Search -- SAM: Self-adaptive Dynamic Analysis for Multithreaded Programs -- Concurrent Small Progress Measures -- Specification and Quantitative Analysis of Probabilistic Cloud Deployment Patterns -- Interpolation-Based Function Summaries in Bounded Model Checking -- Can File Level Characteristics Help Identify System Level Fault-Proneness -- Reverse Coverage Analysis -- Symbolic Testing of OpenCL Code -- Dynamic Test Data Generation for Data Intensive Applications -- Injecting Floating-Point Testing Knowledge into Test Generators -- Combining Theorem Proving and Symbolic Trajectory Evaluation in THM&STE -- HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware -- On-Line Detection and Prediction of Temporal Patterns -- Function Summaries in Software Upgrade Checking -- The Rabin Index of Parity Games -- Using Computational Biology Methods to Improve Post-silicon Microprocessor Testing."]
[null,null,null,"Sommario/riassunto","This book constitutes the thoroughly refereed post-conference proceedings of the 7th International Haifa Verification Conference, HVC 2011, held in Haifa, Israel in December 2011. The 15 revised full papers presented together with 3 tool papers and 4 posters were carefully reviewed and selected from 43 submissions. The papers are organized in topical sections on synthesis, formal verification, software quality, testing and coverage, experience and tools, and posters- student event."]