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[null,"1.","Record Nr.",null,"UNINA9910146056003321"]
[null,null,"Autore",null,"Abd-El-Barr Mostafa"]
[null,null,"Titolo",null,"Fundamentals of Computer Organization and Architecture [[electronic resource]]"]
[null,null,"Pubbl/distr/stampa",null,"Hoboken, : Wiley, 2005"]
[null,null,"ISBN",null,"1-280-25238-3"]
[{"$nulls":4},"9786610252381"]
[{"$nulls":4},"0-470-32195-4"]
[{"$nulls":4},"0-471-47833-4"]
[{"$nulls":4},"0-471-47832-6"]
[null,null,"Descrizione fisica",null,"1 online resource (289 p.)"]
[null,null,"Collana",null,"Wiley Series on Parallel and Distributed Computing ; ; v.38"]
[null,null,"Disciplina",null,"004.2/2"]
[{"$nulls":4},"004.22"]
[{"$nulls":4},"004/.35"]
[null,null,"Soggetti",null,"Computer architecture"]
[{"$nulls":4},"Parallel processing (Electronic computers)"]
[{"$nulls":4},"Engineering & Applied Sciences"]
[{"$nulls":4},"Computer Science"]
[{"$nulls":4},"Electronic books."]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,"Nota di contenuto",null,"FUNDAMENTALS OF COMPUTER ORGANIZATION AND ARCHITECTURE; CONTENTS; Preface; 1. Introduction to Computer Systems; 1.1. Historical Background; 1.2. Architectural Development and Styles; 1.3. Technological Development; 1.4. Performance Measures; 1.5. Summary; Exercises; References and Further Reading; 2. Instruction Set Architecture and Design; 2.1. Memory Locations and Operations; 2.2. Addressing Modes; 2.3. Instruction Types; 2.4. Programming Examples; 2.5. Summary; Exercises; References and Further Reading; 3. Assembly Language Programming; 3.1. A Simple Machine"]
[{"$nulls":4},"3.2. Instructions Mnemonics and Syntax3.3. Assembler Directives and Commands; 3.4. Assembly and Execution of Programs; 3.5. Example: The X86 Family; 3.6. Summary; Exercises; References and Further Reading; 4. Computer Arithmetic; 4.1. Number Systems; 4.2. Integer Arithmetic; 4.3 Floating-Point Arithmetic; 4.4 Summary; Exercises; References and Further Reading; 5. Processing Unit Design; 5.1. CPU "]
[{"$nulls":4},"Basics; 5.2. Register Set; 5.3. Datapath; 5.4. CPU Instruction Cycle; 5.5. Control Unit; 5.6. Summary; Exercises; References; 6. Memory System Design I; 6.1. Basic Concepts; 6.2. Cache Memory"]
[{"$nulls":4},"6.3. SummaryExercises; References and Further Reading; 7. Memory System Design II; 7.1. Main Memory; 7.2. Virtual Memory; 7.3. Read-Only Memory; 7.4. Summary; Exercises; References and Further Reading; 8. Input-Output Design and Organization; 8.1. Basic Concepts; 8.2. Programmed I/O; 8.3. Interrupt-Driven I/O; 8.4. Direct Memory Access (DMA); 8.5. Buses; 8.6. Input-Output Interfaces; 8.7. Summary; Exercises; References and Further Reading; 9 Pipelining Design Techniques; 9.1. General Concepts; 9.2. Instruction Pipeline; 9.3. Example Pipeline Processors; 9.4. Instruction-Level Parallelism"]
[{"$nulls":4},"9.5. Arithmetic Pipeline9.6. Summary; Exercises; References and Further Reading; 10 Reduced Instruction Set Computers (RISCs); 10.1. RISC/CISC Evolution Cycle; 10.2. RISCs Design Principles; 10.3. Overlapped Register Windows; 10.4. RISCs Versus CISCs; 10.5. Pioneer (University) RISC Machines; 10.6. Example of Advanced RISC Machines; 10.7. Summary; Exercises; References and Further Reading; 11 Introduction to Multiprocessors; 11.1. Introduction; 11.2. Classification of Computer Architectures; 11.3. SIMD Schemes; 11.4. MIMD Schemes; 11.5. Interconnection Networks"]
[{"$nulls":4},"11.6. Analysis and Performance Metrics11.7. Summary; Exercises; References and Further Reading; Index"]
[null,null,null,"Sommario/riassunto","This is the first book in the two-volume set offering comprehensive coverage of the field of computer organization and architecture. This book provides complete coverage of the subjects pertaining to introductory courses in computer organization and architecture, including:* Instruction set architecture and design* Assembly language programming* Computer arithmetic* Processing unit design* Memory system design* Input-output design and organization* Pipelining design techniques* Reduced Instruction Set Computers (RISCs)The authors, who share over 15 years of"]
[null,"2.","Record Nr.",null,"UNISA996385185703316"]
[null,null,"Titolo",null,"[Edict du roy sur la reunion de ses subiets, a l'eglise catholique.] [[electronic resource]]"]
[null,null,"Pubbl/distr/stampa",null,"[Imprinted at Roan by Martin Mesgissier, the kinges printer. 1585. With priuiledge. And imprinted at London, : By Richard Ihones, the 27. of Iuly, 1585]"]
[null,null,"Descrizione fisica",null,"[16] p"]
[null,null,"Soggetti",null,"France History Henry III, 1574-1589 Early works to 1800"]
[{"$nulls":4},"France Church history 16th century"]
[null,null,"Lingua di pubblicazione",null,"Francese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","In two parts; pagination and register are continuous. Part 1, in French, precedes part 2. Part 2, which is a translation by Hector Rowland, has separate dated title page that reads: The edict, for the reunityng of his subiectes in the Catholique, Apostolique and Romish Churche. Read, published, and registered in the Court of Parliament at Roan, the 23. of Iuly, 1585."]
[{"$nulls":4},"Title from STC. Imprint from part 2 title page."]
[{"$nulls":4},"Copies vary: with (Peterborough Cathedral. Library) or without (British Library and Trinity College (University of Cambridge). Library): \"Translated by\" before Rowland's name on B4 verso (p. 16)--Cf. STC."]
[{"$nulls":4},"Part 2 formerly STC 13107."]
[{"$nulls":4},"Part 2 identified as STC 13107 on UMI microfilm."]
[{"$nulls":4},"Imperfect; lacks part 1."]
[{"$nulls":4},"Reproduction of the original in the British Library."]
[null,null,null,"Sommario/riassunto","eebo-0018"]