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[null,"1.","Record Nr.",null,"UNINA9911034958303321"]
[null,null,"Autore",null,"Wang Wenxiang"]
[null,null,"Titolo",null,"CPU Design and Practice / / by Wenxiang Wang, Jinzhang Xing"]
[null,null,"Pubbl/distr/stampa",null,"Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2025"]
[null,null,"ISBN",null,"981-9665-73-6"]
[null,null,"Edizione",null,"[1st ed. 2025.]"]
[null,null,"Descrizione fisica",null,"1 online resource (398 pages)"]
[null,null,"Collana",null,"Professional and Applied Computing Series"]
[null,null,"Disciplina",null,"004.22"]
[null,null,"Soggetti",null,"Microprocessors"]
[{"$nulls":4},"Computer architecture"]
[{"$nulls":4},"Computer hardware description languages"]
[{"$nulls":4},"Computers"]
[{"$nulls":4},"Processor Architectures"]
[{"$nulls":4},"Register-Transfer-Level Implementation"]
[{"$nulls":4},"Computer Hardware"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,"Nota di contenuto",null,"Chapter 1. Overview of the CPU Chip Development Process -- Chapter 2. Hardware Experiment Platform and FPGA Design Flow -- Chapter 3. Fundamentals of Digital Logic Circuit Design -- Chapter 4. Design A Single-cycle CPU -- Chapter 5. Design A Simple Pipelined CPU -- Chapter 6. AddMore User Mode Instructions into Pipeline -- Chapter 7. Support Exception and Interrupt -- Chapter 8. AXIBus Interface Design -- Chapter 9. Storage Management Unit Design -- Chapter 10. Cache Design -- Chapter 11. Advanced Experimental Environments -- Chapter 12. Advanced Design."]
[null,null,null,"Sommario/riassunto","The book provides guidance and practical techniques for the CPU design and its implementation. By scheduling a complete CPU design procedure into a series practicing tasks, the book offers a step-by-step process support to the readers for the design of a CPU which can run Unix-like OS (e.g. Linux) kernel. It also covers various design practices and debug skills. The book is suitable for undergraduate and graduate students, lecturers and tutors, as well engineers and practitioners who are interested in the CPU design and implementation."]