{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":2,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":37,"n_cols":5,"rows_kept":37,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[2,4,2,5],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[9,2,9,3],[11,2,11,3],[13,2,13,3],[13,4,13,5],[14,2,14,3],[14,4,14,5],[15,2,15,3],[15,4,15,5],[16,2,16,3],[17,2,17,3],[20,2,20,3],[21,2,21,3],[22,2,22,3],[23,2,23,3],[26,2,26,3],[27,2,27,3],[31,2,31,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNINA990005440680403321"]
[null,null,"Autore",null,"Preisigke, Friedrich"]
[null,null,"Titolo",null,"Namenbuch : enthaltend alle griechischen, lateinischen, ägyptischen, hebräischen, arabischen und sonstigen semitischen und nichtsemitischen Menschennamen, soweit sie in griechischen Urkunden (Papyri, Ostraka, Inschriften, Mumienschildern usw) Ägyptens sich vorfinden / bearbeit und herausgegeben von Friedrich Preisigke"]
[null,null,"Pubbl/distr/stampa",null,"Amsterdam : Adolf M. Hakkert, 1967"]
[null,null,"Edizione",null,"[Rist.]"]
[null,null,"Descrizione fisica",null,"526 col. ; 32 cm"]
[null,null,"Disciplina",null,"483"]
[null,null,"Locazione",null,"FLFBC"]
[null,null,"Collocazione",null,"P2B-210-2PREISIGKE F.-1967"]
[null,null,"Lingua di pubblicazione",null,"Tedesco"]
[{"$nulls":4},"Greco antico"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,"2.","Record Nr.",null,"UNINA9911006781103321"]
[null,null,"Autore",null,"Roychoudhury Abhik"]
[null,null,"Titolo",null,"Embedded systems and software validation / / Abhik Roychoudhury"]
[null,null,"Pubbl/distr/stampa",null,"Amsterdam ; ; Boston, : Morgan Kaufmann Publishers/Elsevier, c2009"]
[null,null,"ISBN",null,"1-282-25804-4"]
[{"$nulls":4},"9786612258046"]
[{"$nulls":4},"0-08-092125-6"]
[null,null,"Descrizione fisica",null,"1 online resource (267 p.)"]
[null,null,"Collana",null,"The Morgan Kaufmann series in systems on silicon"]
[null,null,"Disciplina",null,"004.1"]
[null,null,"Soggetti",null,"Embedded computer systems - Design and construction"]
[{"$nulls":4},"Embedded computer systems - Testing"]
[{"$nulls":4},"Computer software - Testing"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references (p. 233-239) and index."]
[null,null,"Nota di contenuto",null,"Front Cover; Embedded Systems and Software Validation; Copyright Page; Dedication Page; Table of Contents; Acknowledgments; Preface; Chapter 1. Introduction; Chapter 2. Model Validation; 2.1 Platform versus System Behavior; 2.2 Criteria for Design Model; 2.3 Informal Requirements: A Case Study; 2.3.1 The Requirements Document; 2.3.2 Simplification of the Informal Requirements; 2.4 Common Modeling Notations; 2.4.1 Finite-State Machines; 2.4.2 Communicating FSMs; 2.4.3 Message Sequence Chart-Based Models; 2.5 Remarks About Modeling Notations; 2.6 Model Simulations; 2.6.1 FSM Simulations"]
[{"$nulls":4},"2.6.2 Simulating MSC-Based System Models2.7 Model-Based Testing; 2.8 Model Checking; 2.8.1 Property Specification; 2.8.2 Checking Procedure; 2.9 The SPIN Validation Tool; 2.10 The SMV Validation Tool; 2.11 Case Study: Air-Traffic Controller; 2.12 References; 2.13 Exercises; Chapter 3. Communication Validation; 3.1 Common Incompatibilities; 3.1.1 Sending/Receiving Signals in Different Order; 3.1.2 Handling a Different Signal Alphabet; 3.1.3 Mismatch in Data Format; 3.1.4 Mismatch in Data Rates; 3.2 Converter Synthesis; 3.2.1 Representing Native Protocols and Converters"]
[{"$nulls":4},"3.2.2 Basic Ideas for Converter Synthesis3.2.3 Various Strategies for Protocol Conversion; 3.2.4 Avoiding No-Progress Cycles; 3.2.5 Speculative Transmission to Avoid Deadlocks; 3.3 Changing a Working Design; 3.4 References; 3.5 Exercises; Chapter 4. Performance Validation; 4.1 The Conventional Abstraction of Time; 4.2 Predicting "]
[{"$nulls":4},"Execution Time of a Program; 4.2.1 WCET Calculation; 4.2.2 Modeling of Microarchitecture; 4.3 Interference within a Processing Element; 4.3.1 Interrupts from Environment; 4.3.2 Contention and Preemption; 4.3.3 Sharing a Processor Cache"]
[{"$nulls":4},"4.4 System-Level Communication Analysis4.5 Designing Systems with Predictable Timing; 4.5.1 Scratchpad Memories; 4.5.2 Time-Triggered Communication; 4.6 Emerging Applications; 4.7 References; 4.8 Exercises; Chapter 5. Functionality Validation; 5.1 Dynamic or Trace-Based Checking; 5.1.1 Dynamic Slicing; 5.1.2 Fault Localization; 5.1.3 Directed Testing Methods; 5.2 Formal Verification; 5.2.1 Predicate Abstraction; 5.2.2 Software Checking via Predicate Abstraction; 5.2.3 Combining Formal Verification with Testing; 5.3 References; 5.4 Exercises; Bibliography; Index"]
[null,null,null,"Sommario/riassunto","Modern embedded systems require high performance, low cost and low power consumption. Such systems typically consist of a heterogeneous collection of processors, specialized memory subsystems, and partially programmable or fixed-function components. This heterogeneity, coupled with issues such as hardware/software partitioning, mapping, scheduling, etc., leads to a large number of design possibilities, making performance debugging and validation of such systems a difficult problem.   Embedded systems are used to control safety critical applications such as flight control, automotive el"]