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[null,"1.","Record Nr.",null,"UNINA9910983070603321"]
[null,null,"Autore",null,"Weiland Michèle"]
[null,null,"Titolo",null,"High Performance Computing. ISC High Performance 2024 International Workshops : Hamburg, Germany, May 12–16, 2024, Revised Selected Papers / / edited by Michèle Weiland, Sarah Neuwirth, Carola Kruse, Tobias Weinzierl"]
[null,null,"Pubbl/distr/stampa",null,"Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025"]
[null,null,"ISBN",null,"9783031737169"]
[{"$nulls":4},"3031737164"]
[null,null,"Edizione",null,"[1st ed. 2025.]"]
[null,null,"Descrizione fisica",null,"1 online resource (493 pages)"]
[null,null,"Collana",null,"Lecture Notes in Computer Science, , 1611-3349 ; ; 15058"]
[null,null,"Disciplina",null,"621.39"]
[{"$nulls":4},"004.6"]
[null,null,"Soggetti",null,"Computer engineering"]
[{"$nulls":4},"Computer networks"]
[{"$nulls":4},"Software engineering"]
[{"$nulls":4},"Application software"]
[{"$nulls":4},"Microprogramming"]
[{"$nulls":4},"Logic design"]
[{"$nulls":4},"Computer Engineering and Networks"]
[{"$nulls":4},"Software Engineering"]
[{"$nulls":4},"Computer and Information Systems Applications"]
[{"$nulls":4},"Control Structures and Microprogramming"]
[{"$nulls":4},"Logic Design"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,"Nota di contenuto",null,"-- Compiler-Assisted Correctness Checking and Performance Optimization for HPC Workshop (C3PO 2024).  -- Compiler-Based Precalculation of MPI Message Envelopes.  -- Adaptive parallelism in OpenMP through Dynamic Variants.  -- Augmentation of MPI Traces Using Selective Instrumentation.  -- Leveraging Static Analysis to Accelerate Dynamic Race Detection for Remote Memory Access Programs.  -- Static-Dynamic analysis for Performance and Accuracy of Data Race Detection in MPI One-Sided Programs.  -- HPC on Heterogeneous Hardware Workshop (H3 2024).  -- Introducing SYCL to accelerate a Fock operator calculation library of the BigDFT electronic structure code.  -- Portable GPU implementation of the WP-CCC ion-"]
[{"$nulls":4},"atom collisions code.  -- Benchmarking of GPU Performance Saturation on Accelerated Cluster Nodes via Molecular Dynamics Software Packages.  -- Accelerating Fusion Plasma Collision Operator Solves with Portable Batched Iterative Solvers on GPUs.  -- Optimizing GNN-based Multiple Object Tracking on a Graphcore IPU.  -- A Novel Mixed Precision Defect Correction Solver for Heterogeneous Computing.  -- Third Workshop on Communication, I/O, and Storage at Scale on Next-Generation Platforms - Scalable Infrastructures (ISC 2024 IXPUG).  -- Investigating the performance of LLVM- based Intel Fortran Complier.  -- High Performance Fabric Support in DAOS.  -- HPC I/O in the Data Center Workshop (HPC-IODC 2024).  -- Secure Elasticsearch Clusters on HPC Systems for Sensitive Data.  -- Introducing the Metric Proxy for Holistic I/O Measurements 184.  -- Third Combined Workshop on Interactive and Urgent Supercomputing (CW-IUS 2024).  -- Challenges in Computing Resource Sharing towards Next-Gen Interactive Accelerated HPC.  -- Accelerating Time-to-Science by Streaming Detector Data Directly into Perlmutter Compute Nodes.  -- Use Cases for High Performance Research Desktops.  -- 5th ISC HPC International Workshop on Monitoring & Operational Data Analytics (MODA24).  -- Preface to the 5th ISC HPC International Workshop on Monitoring and Operational Data Analytics Workshop (MODA24).  -- An Exascale Slurm Testing and Evaluation Environment Utilizing Generated DAG Workloads. - Challenges for monitoring and data analytics in a leadership public data repository.  -- Fourth International Workshop on RISC-V for HPC.  -- Preparing to Hit the Ground Running: Adding RISC-V support to EESSI.  -- Scaling an Augmented RISC-V Processor Design with High-Level Synthesis.  -- Performance Analysis of BERT on RISC-V Processors with SIMD Units.  -- ntegrating RISC-V SIMT and Scalar Cores: Loosely to Tightly Coupled.  -- Performance characterisation of the 64-core SG2042 RISC-V CPU for HPC.  -- 2nd International Workshop on Sustainable Supercomputing.  -- Impact of Computational Load Balance and Power Capping on Energy Efficiency in HPC Centers.  -- Second International Workshop on Converged Computing on Edge, Cloud, and HPC (WOCC’24).  -- Cluster in the Cloud — scalable, heterogeneous compute clusters for HPC, HTC and AI in the public cloud or on-premise.  -- A User-oriented Portable, Reproducible, and Scalable Software Ecosystem.  -- Leveraging private container networks for increased user isolation and flexibility on HPC clusters.  -- IBIS — An Infrastructure Management Framework for Adaptable, Multi-Sensor Data Collection in Scientific Research.  -- Understanding Layered Portability from HPC to Cloud in Containerized Environments.  -- 8th International Workshop on In Situ Visualization (WOIV’24).  -- Interactive In Situ Visualization.  -- InsitUE - Enabling Hybrid In-situ Visualizations through Unreal Engine and Catalyst.  -- In Situ In Transit Hybrid Analysis with Catalyst-ADIOS2."]
[null,null,null,"Sommario/riassunto","Chapter “Interactive in Situ Visualization” is available open access under a Creative Commons Attribution 4.0 International License via link.springer.com."]