{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":1,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":23,"n_cols":5,"rows_kept":23,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[2,4,2,5],[3,2,3,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[9,2,9,3],[10,2,10,3],[11,2,11,3],[15,2,15,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNINA9910787492903321"]
[null,null,"Autore",null,"Goel Ashok K. <1953->"]
[null,null,"Titolo",null,"A one-semester course in modeling of VLSI interconnections / / Ashok K. Goel"]
[null,null,"Pubbl/distr/stampa",null,"New York, NY : , : Momentum Press, , [2015]"]
[{"$nulls":4},"©2015"]
[null,null,"ISBN",null,"1-60650-513-0"]
[null,null,"Descrizione fisica",null,"1 online resource (362 p.)"]
[null,null,"Collana",null,"Electronic circuits and semiconductor devices collection"]
[null,null,"Disciplina",null,"621.395"]
[null,null,"Soggetti",null,"Integrated circuits - Very large scale integration - Mathematical models"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"1. Introductory concepts -- 1.1 Metallic interconnections -- 1.2 Simplified modeling of resistive interconnections as ladder networks -- 1.3 Propagation modes in a metallic interconnection -- 1.4 Slow-wave mode -- 1.5 Propagation delays --"]
[{"$nulls":4},"2. Modeling of interconnection resistances, capacitances, and inductances -- 2.1 Interconnection resistance -- 2.2 Modeling of resistance for a copper interconnection -- 2.3 Interconnection capacitances -- 2.4 The Green's function method, Method of images -- 2.5 Green's function method, Fourier integral approach -- 2.6 Interconnection inductances -- 2.7 Inductance extraction using FastHenry -- 2.8 Approximate equations for capacitances -- 2.9 Approximate equations for interconnection capacitances and inductances on silicon and GaAs substrates --"]
[{"$nulls":4},"3. Modeling of interconnection delays -- 3.1 Metal-insulator-semiconductor microstrip line model of an interconnection -- 3.2 Transmission line analysis of single-level interconnections -- 3.3 Transmission line model for multilevel interconnections -- 3.4 Modeling of parallel and crossing interconnections -- 3.5 Modeling of very-high-frequency losses in interconnections -- 3.6 Compact modeling of interconnection delays -- 3.7 Modeling of active interconnections --"]
[{"$nulls":4},"4. Modeling of interconnection crosstalk -- 4.1 Lumped capacitance model -- 4.2 Coupled multiconductor MIS microstrip line model -- 4.3 Frequency-domain model analysis of single-level interconnections -- 4.4 Transmission line analysis of parallel multilevel interconnections -- 4.5 Compact expressions for crosstalk analysis --"]
[{"$nulls":4},"5. Modeling of electromigration-induced interconnection failure -- 5.1 Electromigration factors and mechanism -- 5.2 Problems caused by electromigration -- 5.3 Reduction of electromigration -- 5.4 Measurement of electromigration -- 5.5 Electromigration in the copper interconnections -- 5.6 Models of integrated circuit reliability -- 5.7 Modeling of electromigration due to current pulses -- 5.8 Guidelines for testing electromigration --"]
[{"$nulls":4},"6. Other interconnection technologies -- 6.1 Optical interconnections -- 6.2 Superconducting interconnections -- 6.3 Nanotechnology circuit interconnections --"]
[{"$nulls":4},"Appendixes -- A. Tables of constants -- B. Method of images -- C. Method of moments -- D. Transmission line equations -- E. Miller's theorem -- F. Inverse Laplace transformation technique -- Index."]
[null,null,null,"Sommario/riassunto","Quantitative understanding of the parasitic capacitances and inductances and the resultant propagation delays and crosstalk phenomena associated with the metallic interconnections on the very large scale integrated (VLSI) circuits has become extremely important for the optimum design of the state-of-the-art integrated circuits. It is because more than 65 percent of the delays on the integrated circuit chip occur in the interconnections and not in the transistors on the chip. Mathematical techniques to model the parasitic capacitances, inductances, propagation delays, crosstalk noise, and electromigration-induced failure associated with the interconnections in the realistic high-density environment on a chip will be discussed. An overview of the future interconnection technologies for the nanotechnology circuits will also be presented. This book will be the first book of its kind written for a one-semester course on the mathematical modeling of metallic interconnections on a VLSI circuit. In most institutions around the world offering BS, MS, and Ph.D. degrees in Electrical and Computer Engineering, such a course will be suitable for the first-year graduate students and it will also be appropriate as an elective course for senior level BS students. This book will also be of interest to practicing engineers in the field who are looking for a quick refresher on this subject."]