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[null,"1.","Record Nr.",null,"UNINA9910716166303321"]
[null,null,"Titolo",null,"Replica of house in which George Washington was born, at Wakefield, Va. May 21 (calendar day, May 24), 1926. -- Ordered to be printed"]
[null,null,"Pubbl/distr/stampa",null,"[Washington, D.C.] : , : [U.S. Government Printing Office], , 1926"]
[null,null,"Descrizione fisica",null,"1 online resource (1 page)"]
[null,null,"Collana",null,"Senate report / 69th Congress, 1st session. Senate ; ; no. 910"]
[{"$nulls":4},"[United States congressional serial set ] ; ; [serial no. 8526]"]
[null,null,"Soggetti",null,"Birthplaces"]
[{"$nulls":4},"Building"]
[{"$nulls":4},"Historic preservation"]
[{"$nulls":4},"Historic sites"]
[{"$nulls":4},"Presidents"]
[{"$nulls":4},"Associations, institutions, etc"]
[{"$nulls":4},"Legislative materials."]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Batch processed record: Metadata reviewed, not verified. Some fields updated by batch processes."]
[{"$nulls":4},"FDLP item number not assigned."]
[null,"2.","Record Nr.",null,"UNINA9910484916703321"]
[null,null,"Autore",null,"Barkalov Alexander"]
[null,null,"Titolo",null,"Logic synthesis for FPGA-based control units : structural decomposition in logic design  / / Alexander Barkalov [et al.]"]
[null,null,"Pubbl/distr/stampa",null,"Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020"]
[null,null,"ISBN",null,"3-030-38295-8"]
[null,null,"Edizione",null,"[1st edition 2020.]"]
[null,null,"Descrizione fisica",null,"1 online resource (257 p.)"]
[null,null,"Collana",null,"Lecture Notes in Electrical Engineering, , 1876-1100 ; ; 636"]
[null,null,"Disciplina",null,"621.395"]
[null,null,"Soggetti",null,"Automatic control"]
[{"$nulls":4},"Electronic circuits"]
[{"$nulls":4},"Logic circuits - Design"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"FSM-Based Models of Control Units -- Structural decomposition in FSM synthesis -- Twofold State Assignment for Mealy FSMs -- Twofold state assignment for Moore FSMs -- Combining twofold state assignment with transformation of object codes -- Combining twofold state assignment with replacement of logical conditions -- Mixed encoding of microoperations -- Synthesis of Mealy FSMs with counters."]
[null,null,null,"Sommario/riassunto","This book focuses on control units, which are a vital part of modern digital systems, and responsible for the efficiency of controlled systems. The model of a finite state machine (FSM) is often used to represent the behavior of a control unit. As a rule, control units have irregular structures that make it impossible to design their logic circuits using the standard library cells. Design methods depend strongly on such factors as the FSM used, specific features of the logic elements implemented in the FSM logic circuit, and the characteristics of the control algorithm to be interpreted. This book discusses Moore and Mealy FSMs implemented with FPGA chips, including look-up table elements (LUT) and embedded memory blocks (EMB). It is crucial to minimize the number of LUTs and EMBs in an FSM logic circuit, as well as to make the interconnections between the logic elements more regular, and various methods of structural decompositions can be used to solve this problem. These methods are reduced to the presentation of an FSM circuit as a composition of different logic blocks, the majority of which implement systems of intermediate logic functions different (and much simpler) than input memory functions and FSM output "]
[{"$nulls":4},"functions. The structural decomposition results in multilevel FSM circuits having fewer logic elements than equivalent single-level circuits. The book describes well-known methods of structural decomposition and proposes new ones, examining their impact on the final amount of hardware in an FSM circuit. It is of interest to students and postgraduates in the area of Computer Science, as well as experts involved in designing digital systems with complex control units. The proposed models and design methods open new possibilities for creating logic circuits of control units with an optimal amount of hardware and regular interconnections. ."]