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[null,"1.","Record Nr.",null,"UNINA9910713876403321"]
[null,null,"Autore",null,"Copp Martin"]
[null,null,"Titolo",null,"An analysis of airspeed, altitude, and acceleration data obtained from a twin-engine transport airplane operated over a feeder-line route in the Rocky Mountains / / by Martin R. Copp and Mary W. Fetner"]
[null,null,"Pubbl/distr/stampa",null,"Washington, [D.C.] : , : National Advisory Committee for Aeronautics, , 1956"]
[null,null,"Descrizione fisica",null,"1 online resource (23 pages) : illustrations"]
[null,null,"Collana",null,"Technical notes / National Advisory Committee for Aeronautics ; ; No. 3750"]
[null,null,"Soggetti",null,"Acceleration (Mechanics)"]
[{"$nulls":4},"Air speed"]
[{"$nulls":4},"Transport planes"]
[{"$nulls":4},"Turbulence"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","\"October 1956.\""]
[{"$nulls":4},"No Federal Depository Library Program (FDLP) item number."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references (page 10)."]
[null,"2.","Record Nr.",null,"UNINA9910144047403321"]
[null,null,"Titolo",null,"Advances in Computer Systems Architecture : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003"]
[null,null,"ISBN",null,"3-540-39864-3"]
[null,null,"Edizione",null,"[1st ed. 2003.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XIV, 410 p.)"]
[null,null,"Collana",null,"Lecture Notes in Computer Science, , 0302-9743 ; ; 2823"]
[null,null,"Disciplina",null,"004.2/2"]
[null,null,"Soggetti",null,"Computer architecture"]
[{"$nulls":4},"Logic design"]
[{"$nulls":4},"Computer arithmetic and logic units"]
[{"$nulls":4},"Computer input-output equipment"]
[{"$nulls":4},"Microprocessors"]
[{"$nulls":4},"Computer networks"]
[{"$nulls":4},"Computer System Implementation"]
[{"$nulls":4},"Logic Design"]
[{"$nulls":4},"Arithmetic and Logic Structures"]
[{"$nulls":4},"Input/Output and Data Communications"]
[{"$nulls":4},"Processor Architectures"]
[{"$nulls":4},"Computer Communication Networks"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references at the end of each chapters and index."]
[null,null,"Nota di contenuto",null,"How Can the Earth Simulator Impact on Human Activities -- Toward Architecting and Designing Novel Computers -- Designing Ultra-large Instruction Issue Windows -- Multi-threaded Microprocessors – Evolution or Revolution -- The Development of System Software for Parallel Supercomputers -- Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA -- Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research -- Design and Implementation of Java Processors -- MOOSS: CPU Architecture with Memory Protection and Support for OOP -- Reducing Access Count to Register-Files through Operand Reuse -- SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator -- "]
[{"$nulls":4},"Towards an Asynchronous MIPS Processor -- On Implementing High Level Concurrency in Java -- Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures -- A Novel Architecture for Genomic Sequence Searching and Alignment -- A Reconfigurable Multi-threaded Architecture Model -- Reconfigurable Instruction-Level Parallel Processor Architecture -- Mapping Applications to a Coarse Grain Reconfigurable System -- Packing with Boundary Constraints for a Reconfigurable Operating System -- Arithmetic Circuits Combining Residue and Signed-Digit Representations -- A New On-the-fly Summation Algorithm -- State Reordering for Low Power Combinational Logic -- User-Level Management of Kernel Memory -- Variable Radix Page Table: A Page Table for Modern Architectures -- L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy -- Legba: Fast Hardware Support for Fine-Grained Protection -- Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem -- Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor -- Performance of the Achilles Router -- Latency Improvement in Virtual Multicasting -- A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks."]
[null,null,null,"Sommario/riassunto","This conference marked the ?rst time that the Asia-Paci?c Computer Systems Architecture Conference was held outside Australasia (i. e. Australia and New Zealand), and was, we hope, the start of what will be a regular event. The conference started in 1992 as a workshop for computer architects in Australia and subsequently developed into a full-?edged conference covering Austra- sia. Two additional major changes led to the present conference. The ?rst was a change from “computer architecture” to “computer systems architecture”, a change that recognized the importance and close relationship to computer arc- tecture of certain levels of software (e. g. operating systems and compilers) and of other areas (e. g. computer networks). The second change, which re?ected the increasing number of papers being submitted from Asia, was the replacement of “Australasia” with “Asia-Paci?c”. This year’s event was therefore particularly signi?cant, in that it marked the beginning of a truly “Asia-Paci?c” conference. It is intended that in the future the conference venue will alternate between Asia and Australia/New Zealand and, although still small, we hope that in time the conference will develop into a major one that represents Asia to the same - tent as existing major computer-architecture conferences in North America and Europe represent those regions."]