{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":1,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":29,"n_cols":5,"rows_kept":29,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[21,2,21,3],[22,2,22,3],[26,2,26,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNINA9910485005103321"]
[null,null,"Titolo",null,"Embedded Computer Systems: Architectures, Modeling, and Simulation : 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008, Proceedings / / edited by Mladen Berekovic, Nikitas Dimopoulos, Stephan Wong"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2008"]
[null,null,"ISBN",null,"3-540-70550-3"]
[null,null,"Edizione",null,"[1st ed. 2008.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XVI, 300 p.)"]
[null,null,"Collana",null,"Theoretical Computer Science and General Issues, , 2512-2029 ; ; 5114"]
[null,null,"Disciplina",null,"004.22"]
[null,null,"Soggetti",null,"Computer systems"]
[{"$nulls":4},"Computer networks"]
[{"$nulls":4},"Computer science"]
[{"$nulls":4},"Computers"]
[{"$nulls":4},"Microprocessors"]
[{"$nulls":4},"Computer architecture"]
[{"$nulls":4},"Electronic digital computers - Evaluation"]
[{"$nulls":4},"Computer System Implementation"]
[{"$nulls":4},"Computer Communication Networks"]
[{"$nulls":4},"Theory of Computation"]
[{"$nulls":4},"Computer Hardware"]
[{"$nulls":4},"Processor Architectures"]
[{"$nulls":4},"System Performance and Evaluation"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Includes index."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Beachnote -- Can They Be Fixed: Some Thoughts After 40 Years in the Business -- Architecture -- On the Benefit of Caching Traffic Flow Data in the Link Buffer -- Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic -- Scalable Architecture for Prefix Preserving Anonymization of IP Addresses -- New Frontiers -- Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology -- Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications -- 802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in "]
[{"$nulls":4},"Bluespec -- SoC -- A Real-Time Programming Model for Heterogeneous MPSoCs -- A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation -- A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs -- Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors -- Application Specific -- Area Reliability Trade-Off in Improved Reed Muller Coding -- Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set -- ASIP-eFPGA Architecture for Multioperable GNSS Receivers -- Special Session: System Level Design for Heterogeneous Systems -- to System Level Design for Heterogeneous Systems -- Streaming Systems in FPGAs -- Heterogeneous Design in Functional DIF -- Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study -- Evaluation of ASIPs Design with LISATek -- High Level Loop Transformations for Systematic Signal Processing Embedded Applications -- Memory-Centric Hardware Synthesis from Dataflow Models -- Special Session: Programming Multicores -- to Programming Multicores -- Design Issuesin Parallel Array Languages for Shared Memory -- An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency -- Sensors and Sensor Networks -- Climate and Biological Sensor Network -- Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors -- Application Server for Wireless Sensor Networks -- Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks -- System Modeling and Design -- Signature-Based Calibration of Analytical System-Level Performance Models -- System-Level Design Space Exploration of Dynamic Reconfigurable Architectures -- Intellectual Property Protection for Embedded Sensor Nodes."]
[null,null,null,"Sommario/riassunto","This book constitutes the refereed proceedings of the 8th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2008, held in Samos, Greece, in July 2008. The 24 revised full papers presented together with a contamplative keynote and additional papers of two special workshop sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on architecture, new frontiers, SoC, application specific contributions, system level design for heterogeneous systems, programming multicores, sensors and sensor networks; and systems modeling and design."]