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[null,"1.","Record Nr.",null,"UNINA9910350187203321"]
[null,null,"Titolo",null,"Chinese Poetry and Translation: Rights and Wrongs"]
[null,null,"Pubbl/distr/stampa",null,"Amsterdam, : Amsterdam University Press, 2019"]
[null,null,"ISBN",null,"94-6298-994-X"]
[null,null,"Descrizione fisica",null,"1 online resource (353)"]
[null,null,"Disciplina",null,"895.11009"]
[null,null,"Soggetti",null,"China"]
[{"$nulls":4},"Poetry"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,"Nota di contenuto",null,"Frontmatter -- Table of Contents -- Acknowledgments -- Introduction -- Conventions -- 1 Sitting with Discomfort -- 2 Working with Words -- 3 Translating Great Distances -- 4 Purpose and Form -- 5 Embodiment in the Translation of Chinese Poetry -- 6. Translating Theory -- 7 Narrativity in Lyric Translation -- 8 Sublimating Sorrow -- 9 Mediation Is Our Authenticity -- 10 Ecofeminism avant la Lettre -- 11 Ronald Mar and the Trope of Life -- 12 Ya Xian's Lyrical Montage -- 13 Celan's \"Deathfugue\" in Chinese -- 14 Trauma in Translation -- 15 A Noble Art, and a Tricky Business -- Index"]
[null,null,null,"Sommario/riassunto","Chinese Poetry and Translation: Rights and Wrongs offers fifteen essays on the triptych of poetry + translation + Chinese. The collection has three parts: \"The Translator's Take,\" \"Theoretics,\" and \"Impact.\" The conversation stretches from queer-feminist engagement with China's newest poetry to philosophical and philological reflections on its oldest, and from Tang- and Song-dynasty classical poetry in Western languages to Baudelaire and Celan in Chinese. Translation is taken as an interlingual and intercultural act, and the essays foreground theoretical expositions and the practice of translation in equal but not opposite measure. Poetry has a transforming yet ever-acute relevance in Chinese culture, and this makes it a good entry point for studying Chinese-foreign encounters. Pushing past oppositions that still too often restrict discussions of translation-form versus content, elegance versus accuracy, and \"the original\" versus \"the translated\"-this volume brings a wealth of new thinking to the interrelationships between poetry, translation, and China."]
[null,"2.","Record Nr.",null,"UNINA9910790517303321"]
[null,null,"Autore",null,"Yiu Joseph"]
[null,null,"Titolo",null,"The definitive guide to ARM Cortex-M3 and Cortex-M4 processors / / Joseph Yiu, ARM Ltd., Cambridge, UK"]
[null,null,"Pubbl/distr/stampa",null,"Oxford : , : Newnes, , 2014"]
[null,null,"ISBN",null,"0-12-407918-0"]
[null,null,"Edizione",null,"[Third edition.]"]
[null,null,"Descrizione fisica",null,"1 online resource (xxxv, 818, 200 pages) : illustrations (some color)"]
[null,null,"Collana",null,"Gale eBooks"]
[null,null,"Disciplina",null,"1055"]
[null,null,"Soggetti",null,"Embedded computer systems"]
[{"$nulls":4},"Microprocessors"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Front Cover; The Definitive Guide to ARM® Cortex®-M3 and Cortex-M4 Processors; Copyright; Contents; Foreword; Preface; Synopsis; About this Book; Contributor Bio-Paul Beckmann; Acknowledgments; Terms and Abbreviations; Conventions; Chapter 1 - Introduction to ARM® Cortex®-M Processors; 1.1 What are the ARM® Cortex®-M processors?; 1.2 Advantages of the Cortex®-M processors; 1.3 Applications of the ARM® Cortex®-M processors; 1.4 Resources for using ARM® processors and ARM microcontrollers; 1.5 Background and history; Chapter 2 - Introduction to Embedded Software Development"]
[{"$nulls":4},"2.1 What are inside typical ARM® microcontrollers?2.2 What you need to start; 2.3 Software development flow; 2.4 Compiling your applications; 2.5 Software flow; 2.6 Data types in C programming; 2.7 Inputs, outputs, and peripherals accesses; 2.8 Microcontroller interfaces; 2.9 The Cortex® microcontroller software interface standard (CMSIS); Chapter 3 - Technical Overview; 3.1 General information about the Cortex®-M3 and Cortex-M4 processors; 3.2 Features of the Cortex®-M3 and Cortex-M4 processors; Chapter 4 - Architecture; 4.1 Introduction to the architecture; 4.2 Programmer's model"]
[{"$nulls":4},"4.3 Behavior of the application program status register (APSR)4.4 Memory system; 4.5 Exceptions and interrupts; 4.6 System control block (SCB); 4.7 Debug; 4.8 Reset and reset sequence; Chapter 5 - Instruction Set; 5.1 Background to the instruction set in ARM® Cortex®-M processors; 5.2 Comparison of the instruction set in ARM® Cortex®-M processors; 5.3 Understanding the assembly language syntax; 5.4 Use of a suffix in instructions; 5.5 Unified assembly language (UAL); 5.6 Instruction set; 5.7 Cortex®-M4-specific instructions; 5.8 Barrel shifter"]
[{"$nulls":4},"5.9 Accessing special instructions and special registers in programmingChapter 6 - Memory System; 6.1 Overview of memory system features; 6.2 Memory map; 6.3 Connecting the processor to memory and peripherals; 6.4 Memory requirements; 6.5 Memory endianness; 6.6 Data alignment and unaligned data access support; 6.7 Bit-band operations; 6.8 Default memory access permissions; 6.9 Memory access attributes; 6.10 Exclusive accesses; 6.11 Memory barriers; 6.12 Memory system in a microcontroller; Chapter 7 - Exceptions and Interrupts; 7.1 Overview of exceptions and interrupts; 7.2 Exception types"]
[{"$nulls":4},"7.3 Overview of interrupt management7.4 Definitions of priority; 7.5 Vector table and vector table relocation; 7.6 Interrupt inputs and pending behaviors; 7.7 Exception sequence overview; 7.8 Details of NVIC registers for interrupt control; 7.9 Details of SCB registers for exception and interrupt control; 7.10 Details of special registers for exception or interrupt masking; 7.11 Example procedures in setting up interrupts; 7.12 Software interrupts; 7.13 Tips and hints; Chapter 8 - Exception Handling in Detail; 8.1 Introduction; 8.2 Exception sequences"]
[{"$nulls":4},"8.3 Interrupt latency and exception handling optimization"]
[null,null,null,"Sommario/riassunto","This new edition has been fully revised and updated to include extensive information on the ARM Cortex-M4 processor, providing a complete up-to-date guide to both Cortex-M3 and Cortex-M4 processors, and which enables migration from various processor architectures to the exciting world of the Cortex-M3 and M4.    Key Features include:    Two new chapters on DSP features and CMSIS-DSP software libraries, covering DSP fundamentals and how to write DSP software for the Cortex-M4 processor, including examples of using the CMSIS-DSP library, as well as useful information"]