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[null,"1.","Record Nr.",null,"UNINA9910337469703321"]
[null,null,"Autore",null,"Badel Stéphane"]
[null,null,"Titolo",null,"Design Automation for Differential MOS Current-Mode Logic Circuits  / / by Stéphane Badel, Can Baltaci, Alessandro Cevrero, Yusuf Leblebici"]
[null,null,"Pubbl/distr/stampa",null,"Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019"]
[null,null,"ISBN",null,"3-319-91307-7"]
[null,null,"Edizione",null,"[1st ed. 2019.]"]
[null,null,"Descrizione fisica",null,"1 online resource (X, 233 p. 149 illus., 75 illus. in color.)"]
[null,null,"Disciplina",null,"621.3815"]
[null,null,"Soggetti",null,"Electronic circuits"]
[{"$nulls":4},"Electronics"]
[{"$nulls":4},"Microelectronics"]
[{"$nulls":4},"Microprocessors"]
[{"$nulls":4},"Circuits and Systems"]
[{"$nulls":4},"Electronics and Microelectronics, Instrumentation"]
[{"$nulls":4},"Processor Architectures"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Introduction -- Analysis of MOS Current-Mode Logic Circuits -- Design of MOS Current-Mode Logic Cells -- Design Methodology for MCML Standard Cells -- Design Automation for Differential Circuits -- Design Example I : Low-Noise Encoder Circuit for A/D Converter -- Design Example II : High-Speed Multiplexer -- Design Example III : Grain-128a Stream Cipher -- Design Example IV: DPA Resistant Processor."]
[null,null,null,"Sommario/riassunto","This book discusses the implementation of digital circuits by using MCML gates. Although digital circuit implementation is possible with other elements, such as CMOS gates, MCML implementations can provide superior performance in certain applications. This book provides a complete automation methodology for the implementation of digital circuits in MCML and provides an extensive explanation on the technical details of design of MCML. A systematic methodology is presented to build efficient MCML standard-cell libraries, and a complete top-down design flow is shown to implement complex systems using such building blocks."]