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[null,"1.","Record Nr.",null,"UNINA9910166633803321"]
[null,null,"Titolo",null,"System level ESD co-design / / edited by Charvaka Duvvury, Harald Gossner"]
[null,null,"Pubbl/distr/stampa",null,"West Sussex, England : , : Wiley-IEEE Press, , 2015"]
[{"$nulls":4},"©2015"]
[null,null,"ISBN",null,"1-118-86188-4"]
[{"$nulls":4},"1-118-86184-1"]
[{"$nulls":4},"9781118861899"]
[null,null,"Descrizione fisica",null,"1 online resource (533 p.)"]
[null,null,"Collana",null,"Wiley - IEEE"]
[null,null,"Classificazione",null,"TEC031000"]
[null,null,"Disciplina",null,"537/.2"]
[null,null,"Soggetti",null,"Shielding (Electricity)"]
[{"$nulls":4},"Electronic apparatus and appliances - Design and construction"]
[{"$nulls":4},"Integrated circuits - Design and construction"]
[{"$nulls":4},"Integrated circuits - Protection"]
[{"$nulls":4},"Electrostatics"]
[{"$nulls":4},"Static eliminators"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Description based upon print version of record."]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Machine generated contents note:  Chapter 1 Introduction Charvaka Duvvury Chapter 2 Component Versus System Level ESD Charvaka Duvvury and Harald Gossner Chapter 3 System Level Testing for ESD Susceptibility Michael Hopkins Chapter 4 PCB/IC Co-Design Concepts for SEED Harald Gossner and Charvaka Duvvury Chapter 5 Hard Fails & PCB Protection Devices Robert Ashton Chapter 6 Soft Fail and PCB design measures David Pommerenke and Pratik Maheshwari Chapter 7 ESD in Mobile Devices Matti Uusimaki Chapter 8 ESD for Automotive Applications Wolfgang Reinprecht Chapter 9 Futire Applications of SEED Methodology Harald Gossner and Charvaka Duvvury Chapter 10 Co-Design Tradeoffs: Balancing Robustness, Performance and Cost Jeffery C. Dunnihoo Index ."]
[null,null,null,"Sommario/riassunto","\"Demystifies the concept of system-level ESD and details its difference from the conventional component level ESD design and testing. Describes the protection elements and designs and focuses on the \"co-design\", an optimization methodology to address both issues in the same design space\"--"]