{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":1,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":21,"n_cols":5,"rows_kept":21,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[2,4,2,5],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[9,2,9,3],[15,2,15,3],[16,2,16,3],[19,2,19,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNINA9910151782503321"]
[null,null,"Autore",null,"Ahmed Jameel"]
[null,null,"Titolo",null,"Fuzzy Logic Based Power-Efficient Real-Time Multi-Core System / / by Jameel Ahmed, Mohammed Yakoob Siyal, Shaheryar Najam, Zohaib Najam"]
[null,null,"Pubbl/distr/stampa",null,"Singapore : , : Springer Singapore : , : Imprint : Springer, , 2017"]
[null,null,"ISBN",null,"981-10-3120-7"]
[null,null,"Edizione",null,"[1st ed. 2017.]"]
[null,null,"Descrizione fisica",null,"1 online resource (IX, 62 p. 40 illus., 22 illus. in color.)"]
[null,null,"Collana",null,"SpringerBriefs in Computational Intelligence, , 2625-3704"]
[null,null,"Disciplina",null,"006.3"]
[null,null,"Soggetti",null,"Computational intelligence"]
[{"$nulls":4},"Microprocessors"]
[{"$nulls":4},"Electronic circuits"]
[{"$nulls":4},"Computational Intelligence"]
[{"$nulls":4},"Processor Architectures"]
[{"$nulls":4},"Circuits and Systems"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references."]
[null,null,"Nota di contenuto",null,"Multiprocessors and Cache Memory -- Energy Delay Product and Throughput -- Challenges and Issues in Modern Computer Architectures -- Real-Time Power And Performance Aware System -- Fuzzy Logic Theory. ."]
[null,null,null,"Sommario/riassunto","This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors. ."]