{"text_format":"2","workbook":"xls","n_sheets":1,"sheets":["report2"],"not_rendered":{"charts":0,"images":0,"macros":0,"external_links":1,"defined_names":2,"comments":0,"pivot_tables":0},"unopened":[],"bounds":{"document_bytes":16777216,"sheet_cells":100000,"run_cost":"one","rows_first":2000,"rows_last":500,"rows_between":2000,"halvings":0,"cell_chars":16384,"cell_head_chars":4096},"cells_cut":0,"cells_raw":0,"read":"whole","date_system":"1900","formulas":"cached_only"}

{"sheet":"report2","index":0,"n_rows":39,"n_cols":5,"rows_kept":39,"cut":false,"hidden":false,"merged":[[0,2,0,3],[0,4,0,5],[1,2,1,3],[1,4,1,5],[2,2,2,3],[2,4,2,5],[3,2,3,3],[4,2,4,3],[5,2,5,3],[6,2,6,3],[7,2,7,3],[8,2,8,3],[9,2,9,3],[11,2,11,3],[11,4,11,5],[12,2,12,3],[12,4,12,5],[13,2,13,3],[14,2,14,3],[15,2,15,3],[16,2,16,3],[17,2,17,3],[18,2,18,3],[19,2,19,3],[31,2,31,3],[32,2,32,3],[36,2,36,3]],"flags":["formulas_cached_only"]}
[null,"1.","Record Nr.",null,"UNIBAS000040158"]
[null,null,"Autore",null,"Levine, Lee L."]
[null,null,"Titolo",null,"Visual Judaism in late antiquity : historical contexts of Jewish art / Lee I. Levine"]
[null,null,"Pubbl/distr/stampa",null,"New Haven ; London : Yale University Press, 2012"]
[null,null,"ISBN",null,"978-0-300-10089-1"]
[null,null,"Descrizione fisica",null,"X, 582 p. : ill. ; 26 cm."]
[null,null,"Disciplina",null,"704.03924"]
[null,null,"Soggetti",null,"Arte ebraica - Medioevo"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,"2.","Record Nr.",null,"UNISA996465920803316"]
[null,null,"Titolo",null,"Automated Technology for Verification and Analysis [[electronic resource] ] : 5th International Symposium, ATVA 2007 Tokyo, Japan, October 22-25, 2007 Proceedings / / edited by Kedar Namjoshi, Tomohiro Yoneda, Teruo Higashino, Yoshio Okamura"]
[null,null,"Pubbl/distr/stampa",null,"Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007"]
[null,null,"ISBN",null,"3-540-75596-9"]
[null,null,"Edizione",null,"[1st ed. 2007.]"]
[null,null,"Descrizione fisica",null,"1 online resource (XIV, 570 p.)"]
[null,null,"Collana",null,"Programming and Software Engineering ; ; 4762"]
[null,null,"Disciplina",null,"511.36028563"]
[null,null,"Soggetti",null,"Computer-aided engineering"]
[{"$nulls":4},"Computer logic"]
[{"$nulls":4},"Computers"]
[{"$nulls":4},"Computer communication systems"]
[{"$nulls":4},"Special purpose computers"]
[{"$nulls":4},"Software engineering"]
[{"$nulls":4},"Computer-Aided Engineering (CAD, CAE) and Design"]
[{"$nulls":4},"Logics and Meanings of Programs"]
[{"$nulls":4},"Information Systems and Communication Service"]
[{"$nulls":4},"Computer Communication Networks"]
[{"$nulls":4},"Special Purpose and Application-Based Systems"]
[{"$nulls":4},"Software Engineering"]
[null,null,"Lingua di pubblicazione",null,"Inglese"]
[null,null,"Formato",null,"Materiale a stampa"]
[null,null,null,"Livello bibliografico","Monografia"]
[null,null,null,"Note generali","Bibliographic Level Mode of Issuance: Monograph"]
[null,null,null,"Nota di bibliografia","Includes bibliographical references and index."]
[null,null,"Nota di contenuto",null,"Invited Talks -- Policies and Proofs for Code Auditing -- Recent Trend in Industry and Expectation to DA Research -- Toward Property-Driven Abstraction for Heap Manipulating Programs -- Branching vs. Linear Time: Semantical Perspective -- Regular Papers -- Mind the Shapes: Abstraction Refinement Via Topology Invariants -- Complete SAT-Based Model Checking for Context-Free Processes -- Bounded Model Checking of Analog and Mixed-Signal Circuits Using an SMT Solver -- Model Checking Contracts – A Case Study -- On the Efficient Computation of the Minimal Coverability Set for Petri Nets -- Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces -- Automatic Merge-Point Detection for Sequential "]
[{"$nulls":4},"Equivalence Checking of System-Level and RTL Descriptions -- Proving Termination of Tree Manipulating Programs -- Symbolic Fault Tree Analysis for Reactive Systems -- Computing Game Values for Crash Games -- Timed Control with Observation Based and Stuttering Invariant Strategies -- Deciding Simulations on Probabilistic Automata -- Mechanizing the Powerset Construction for Restricted Classes of ?-Automata -- Verifying Heap-Manipulating Programs in an SMT Framework -- A Generic Constructive Solution for Concurrent Games with Expressive Constraints on Strategies -- Distributed Synthesis for Alternating-Time Logics -- Timeout and Calendar Based Finite State Modeling and Verification of Real-Time Systems -- Efficient Approximate Verification of Promela Models Via Symmetry Markers -- Latticed Simulation Relations and Games -- Providing Evidence of Likely Being on Time: Counterexample Generation for CTMC Model Checking -- Assertion-Based Proof Checking of Chang-Roberts Leader Election in PVS -- Continuous Petri Nets: Expressive Power and Decidability Issues -- Quantifying the Discord: Order Discrepancies in Message Sequence Charts -- A Formal Methodology to Test Complex Heterogeneous Systems -- A New Approach to Bounded Model Checking for Branching Time Logics -- Exact State Set Representations in the Verification of Linear Hybrid Systems with Large Discrete State Space -- A Compositional Semantics for Dynamic Fault Trees in Terms of Interactive Markov Chains -- 3-Valued Circuit SAT for STE with Automatic Refinement -- Bounded Synthesis -- Short Papers -- Formal Modeling and Verification of High-Availability Protocol for Network Security Appliances -- A Brief Introduction to  -- On-the-Fly Model Checking of Fair Non-repudiation Protocols -- Model Checking Bounded Prioritized Time Petri Nets -- Using Patterns and Composite Propositions to Automate the Generation of LTL Specifications -- Pruning State Spaces with Extended Beam Search -- Using Counterexample Analysis to Minimize the Number of Predicates for Predicate Abstraction."]
[null,null,null,"Sommario/riassunto","This book constitutes the refereed proceedings of the 5th International Symposium on Automated Technology for Verification and Analysis, ATVA 2007, held in Tokyo, Japan, October 22-25, 2007. The 29 revised full papers presented together with 7 short papers were carefully reviewed and selected from 88 submissions. The papers address theoretical methods to achieve correct software or hardware systems, including both functional and non functional aspects; as well as applications of theory in engineering methods and particular domains and handling of practical problems occurring in tools."]