LEADER 01249cam2 22003013 450 001 SOBE00028906 005 20231214094633.0 100 $a20121203d1971 |||||ita|0103 ba 101 $aita 102 $aIT 200 1 $a<<22: Le >>lettere$e2 : 124-184/A$etesto latino dell'edizione maurina confrontato con il Corpus scriptorum ecclesiasticorum Latinorum$fSant'Agostino$gtraduzione e note di Luigi Carrozzi 210 $aRoma$cCittà Nuova Editrice$d1971 215 $a942 p.$cill.$d24 cm 300 $aNell'occhietto : Parte II: Le Lettere 461 1$1001SOBE00028516$12001 $aOpere di Sant'Agostino 700 1$aAugustinus$b, Aurelius $3AF00004539$4070$0152280 702 1$aCarrozzi, Luigi$3SOBA00005201$4070 801 0$aIT$bUNISOB$c20231214$gRICA 850 $aUNISOB 852 $aUNISOB$j200|Coll|16|K$m26569 852 $aUNISOB$j200|Coll|16|K$m55216 912 $aSOBE00028906 940 $aM 102 Monografia moderna SBN 941 $aM 957 $a200|Coll|16|K$b000022$gSI$d26569$1catenacci$2UNISOB$3UNISOB$420121203091456.0$520231214094625.0$6Spinosa 957 $a200|Coll|16|K$b000022$i-b$gSI$d55216$1catenacci$2UNISOB$3UNISOB$420121203091606.0$520231214094633.0$6Spinosa 996 $aLettere$9227502 997 $aUNISOB LEADER 03463oam 2200493 450 001 9910299745203321 005 20190911103512.0 010 $a1-4614-7798-0 024 7 $a10.1007/978-1-4614-7798-3 035 $a(OCoLC)858403117 035 $a(MiFhGG)GVRL6USJ 035 $a(EXLCZ)992670000000427489 100 $a20140415d2014 uy 0 101 0 $aeng 135 $aurun|---uuuua 181 $ctxt 182 $cc 183 $acr 200 10$aComputing with memory for energy-efficient robust systems /$fSomnath Paul, Swarup Bhunia 205 $a1st ed. 2014. 210 1$aNew York :$cSpringer,$d2014. 215 $a1 online resource (xiii, 210 pages) $cillustrations (some color) 225 0 $aGale eBooks 300 $aDescription based upon print version of record. 311 $a1-4614-7797-2 320 $aIncludes bibliographical references. 327 $aPart I Introduction -- Challenges in Computing for Nanoscale Technologies -- A Survey of Computing Architectures -- Motivation for a Memory-Based Computing Hardware -- Part II Memory Based Computing -- Key Features of Memory-Based Computing -- Overview of Hardware and Software Architectures -- Application of Memory-Based Computing -- Part III Hardware Framework -- A Memory Based Generic Reconfigurable Framework -- MAHA Hardware Architecture -- Part IV Software Framework -- Application Analysis -- Application Mapping to MBC Hardware. 330 $aThis book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime.  The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior.  Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms.  ·         Introduces new paradigm for hardware reconfigurable frameworks, which leverages dense memory array as a malleable resource, which can be used for information storage as well as computation; ·         Merges spatial and temporal computing to minimize interconnect overhead and achieve better scalability compared to state-of-the-art reconfigurable computing platforms; ·         Enables efficient mapping of diverse data-intensive applications from domains of signal processing, multimedia and security applications. 606 $aNanoelectromechanical systems 606 $aComputer engineering 615 0$aNanoelectromechanical systems. 615 0$aComputer engineering. 676 $a004.1 676 $a620 676 $a621.381 676 $a621.3815 700 $aPaul$b Somnath$4aut$4http://id.loc.gov/vocabulary/relators/aut$0957747 702 $aBhunia$b Swarup 801 0$bMiFhGG 801 1$bMiFhGG 906 $aBOOK 912 $a9910299745203321 996 $aComputing with Memory for Energy-Efficient Robust Systems$92169653 997 $aUNINA