LEADER 01632nam0 22003733i 450 001 UBO1290627 005 20251003044420.0 010 $a0898382351 100 $a20110110d1987 ||||0itac50 ba 101 | $aeng 102 $aus 181 1$6z01$ai $bxxxe 182 1$6z01$an 200 1 $aˆA ‰VLSI architecture for concurrent data structures$fby William J. Dally 210 $aBoston [etc.]$cKluwer Academic$d1987 215 $aXVI, 243 p.$d25 cm 225 | $aˆThe ‰Kluwer international series in engineering and computer science$i. Communications and information theory$v27 410 0$1001MIL0186106$12001 $aˆThe ‰Kluwer international series in engineering and computer science$i. Communications and information theory$v27 606 $aCircuiti integrati$2FIR$3CFIC002586$9E 606 $aElaboratori elettronici$xStruttura$2FIR$3CFIC000902$9E 676 $a621.39$9INGEGNERIA DEGLI ELABORATORI$v14 676 $a621.395$9INGEGNERIA DEGLI ELABORATORI. CIRCUITERIA$v22 696 $aChip$aCircuiti elettronici integrati 699 $aCircuiti integrati$yChip 699 $aCircuiti integrati$yCircuiti elettronici integrati 700 1$aDally$b, William J.$3MILV213170$4070$059715 801 3$aIT$bIT-000000$c20110110 850 $aIT-BN0095 901 $bNAP 01$cSALA DING $n$ 912 $aUBO1290627 950 0$aBiblioteca Centralizzata di Ateneo$c1 v.$d 01SALA DING 621.39 DAL.vl$e 0102 0000006705 VMA A4 1 v.$fY $h19940210$i20110110 977 $a 01 996 $aVLSI architecture for concurrent data structures$91575636 997 $aUNISANNIO