LEADER 01663nam1 22004093i 450 001 TSA0031766 005 20251003044415.0 010 $a0444878904$bset 100 $a20100421g19861987||||0itac50 ba 101 | $aeng 102 $anl 181 1$6z01$ai $bxxxe 182 1$6z01$an 200 1 $aCircuit analysis, simulation and design$fedited by A. E. Ruehli 210 $aAmsterdam [etc.]$cNorth-Holland$d1986-1987 215 $a2 volumi (XII, 332; XX, 399 p.)$d24 cm. 225 | $aAdvances in CAD for VSLI$v3 410 0$1001RMS0009753$12001 $aAdvances in CAD for VSLI$v3 463 1$1001TSA0031769$12001 $aˆPart 1: ‰General aspects of circuit analysis and design$fedited by A. E. Ruehli$v1 463 1$1001TSA0031770$12001 $aˆPart 2: ‰VLSI circuit analysis and simulation$fedited by A. E. Ruehli$v2 606 $aCircuiti elettrici$xAnalisi$2FIR$3SBLC024221$9I 606 $aCircuiti integrati$xProgettazione$2FIR$3MILC095947$9E 676 $a621.39$9INGEGNERIA DEGLI ELABORATORI$v14 676 $a621.395$9INGEGNERIA DEGLI ELABORATORI. CIRCUITERIA$v22 696 $aChip$aCircuiti elettronici integrati 699 $aCircuiti integrati$yChip 699 $aCircuiti integrati$yCircuiti elettronici integrati 702 1$aRuehli$b, Albert E.$f <1937- >$3TSAV014635 801 3$aIT$bIT-000000$c20100421 850 $aIT-BN0095 901 $bNAP 01$cSALA DING $n$ 912 $aTSA0031766 950 1$aBiblioteca Centralizzata di Ateneo$cParte 1-2$d 01SALA DING 621.39 CIRASA 967 $m2 977 $a 01 996 $aCircuit analysis, simulation and design$91501296 997 $aUNISANNIO