LEADER 01569nam0 22003493i 450 001 RMS0009135 005 20241220063107.0 010 $a0863411363 100 $a20090421d1988 ||||0itac50 ba 101 | $aeng 102 $agb 181 1$6z01$ai $bxxxe 182 1$6z01$an 200 1 $aParallel processing in control$ethe transputer and other architectures$fedited by P. J. Fleming 210 $aLondon$cP. Peregrinus on behalf of the Institution of Electrical Engineers$dc1988 215 $aXIV, 243 p.$cill.$d24 cm. 225 | $aIEE control engineering series$fInstitution of electrical engineers$v38 225 | $aIEE computing series$v38 314 $aeditor$9RMSV007115 410 0$1001MIL0024551$12001 $aIEE control engineering series$fInstitution of electrical engineers$v38$171201$aInstitution of electrical engineers$b : Power division$3LO1V396346 410 0$1001MIL0030052$12001 $aIEE computing series$v38 606 $aSistemi di controllo automatici$xElaborazione elettronica$2FIR$3NAPC237129$9I 676 $a629.8$9INGEGNERIA DEI CONTROLLI AUTOMATICI$v14 676 $a629.895$9CONTROLLO COMPUTERIZZATO DEI PROCESSI$v22 702 1$aFleming$b, Peter J.$3RMSV007115 801 3$aIT$bIT-NA0079$c20090421 850 $aIT-BN0095 912 $aRMS0009135 950 0$aBiblioteca Centralizzata di Ateneo$c1 v.$d 01SALA DING 629.8 PARPIC$e 0102 0000053035 B A4 1 v.$f3 $h20040204$i20040204 977 $a 01 996 $aParallel processing in control$91495495 997 $aUNISANNIO