LEADER 00920nam a2200265 i 4500 001 991002420979707536 005 20020508195931.0 008 941128s1986 it 00| 0 ita d 020 $a883117228X 035 $ab11006754-39ule_inst 035 $aPARLA162274$9ExL 040 $aDip.to Scienze pedagogiche$bita 100 1 $aVeronese Carere Comes, Giulia$0538729 245 10$aCorporeità e amore :$bla dimensione umana del sesso /$cGiulia Veronese Carere Comes 260 $aRoma :$bCittà Nuova,$c1986 300 $a342 p. ;$c20 cm 650 4$aAmore coniugale 650 4$aCoppia 650 4$aSesso 907 $a.b11006754$b02-04-14$c28-06-02 912 $a991002420979707536 945 $aLE022 MP 81 E 46$g1$i2022000150729$lle022$o-$pE0.00$q-$rl$s- $t0$u1$v0$w1$x0$y.i11123813$z28-06-02 996 $aCorporeità e amore$9861674 997 $aUNISALENTO 998 $ale022$b01-01-94$cm$da $e-$fita$git $h0$i1 LEADER 02067oam 2200493zu 450 001 9910145114803321 005 20241212215609.0 010 $a9781509086498 010 $a1509086498 010 $a9781424413423 010 $a1424413427 035 $a(CKB)1000000000698123 035 $a(SSID)ssj0000454206 035 $a(PQKBManifestationID)12203037 035 $a(PQKBTitleCode)TC0000454206 035 $a(PQKBWorkID)10396624 035 $a(PQKB)11407619 035 $a(NjHacI)991000000000698123 035 $a(EXLCZ)991000000000698123 100 $a20160829d2007 uy 101 0 $aeng 135 $aur||||||||||| 181 $ctxt 182 $cc 183 $acr 200 00$a2007 European Conference on Circuit Theory and Design 210 31$a[Place of publication not identified]$cI E E E$d2007 215 $a1 online resource 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a9781424413416 311 08$a1424413419 330 $a3D discrete wavelet transform (DWT) is a compute-intensive task that is usually implemented on specific architectures in many real-time medical imaging systems. In this paper, a novel area-efficient high-throughput 3D DWT architecture is proposed based on distributed arithmetic. A tap-merging technique is used to reduce the size of DA lookup tables. The proposed architectures were designed in VHDL and mapped to a Xilinx Virtex-E FPGA. The synthesis results show the proposed architecture has a low area cost and can run up to 85 MHz, which can perform a five-level 3D wavelet analysis for seven 128 times 128 times 128 volume images per second. 606 $aElectric circuits$vCongresses 606 $aElectric filters$vCongresses 606 $aElectric networks$vCongresses 615 0$aElectric circuits 615 0$aElectric filters 615 0$aElectric networks 676 $a621.3192 801 0$bPQKB 906 $aPROCEEDING 912 $a9910145114803321 996 $a2007 European Conference on Circuit Theory and Design$92501857 997 $aUNINA