LEADER 08021nam 22008055 450 001 996664546603316 005 20250611130257.0 010 $a3-031-90200-9 024 7 $a10.1007/978-3-031-90200-0 035 $a(CKB)39239891500041 035 $a(MiAaPQ)EBC32151502 035 $a(Au-PeEL)EBL32151502 035 $a(DE-He213)978-3-031-90200-0 035 $a(OCoLC)1523371484 035 $a(EXLCZ)9939239891500041 100 $a20250611d2025 u| 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aEuro-Par 2024: Parallel Processing Workshops $eEuro-Par 2024 International Workshops, Madrid, Spain, August 26?30, 2024, Proceedings, Part I /$fedited by Silvina Caino-Lores, Demetris Zeinalipour, Thaleia Dimitra Doudali, David E. Singh, Gracia Ester Martín Garzón, Leonel Sousa, Diego Andrade, Tommaso Cucinotta, Donato D'Ambrosio, Patrick Diehl, Manuel F. Dolz, Admela Jukan, Raffaele Montella, Matteo Nardelli, Marta Garcia-Gasulla, Sarah Neuwirth 205 $a1st ed. 2025. 210 1$aCham :$cSpringer Nature Switzerland :$cImprint: Springer,$d2025. 215 $a1 online resource (732 pages) 225 1 $aLecture Notes in Computer Science,$x1611-3349 ;$v15385 311 08$a3-031-90199-1 327 $aPreface of the European Workshop on Quantum Computing for High-Performance Computing -- Hybrid Quantum Computing: the Use Case of Shor's Algorithm -- A Quantum Emulation Workbench for Benchmark Construction and Application Development -- TNBS: A Kernel-Based Benchmarking for Digital Quantum Computers -- Variational Quantum Eigensolver for Classi?cation in Distributed Data Sets -- LazyQML: A Python library to benchmark Quantum Machine Learning models -- Optimizing a quantum BCD Adder in terms of T-gates and CNOT gates -- Factoring integers via Schnorr's algorithm assisted with VQE -- Adiabatic training for Variational Quantum Algorithms -- Quantum Compilation Process: a Survey -- 19th International Workshop on Virtualization in High-Performance Cloud Computing (VHPC 2024) -- An Investigation of the Linux Virtual Networking Latencies -- Performance Implications of SEV Virtual Machine Live Migration -- Boosting Serverless Computing: A Survey on Architecture Designs and Accelerator Support for Serverless Platforms -- LLMs for Virtualized Networking Infrastructures: An Industrial Report -- Towards Using Partitioned GPU Virtual Functions for Mixture of Experts -- International Workshop in High-Performance Computing in Physics (PHYSHPC) -- Runtime Instantiation of Kernels for Fast Fourier Transforms Using SYCL Specialization Constants -- Towards Large-scale Top-Down Microarchitecture Analysis Using the Score-P Framework -- Coalescing MPI communication in 6D Vlasov simulations: solving ghost domains in Vlasiator -- Understanding the Impact of openPMD on BIT1, a Particle-in-Cell Monte Carlo Code, through Instrumentation, Monitoring, and In-Situ Analysis -- Workshop proceedings -- Lessons Learned and Scalability Achieved When Porting Uintah to DOE Exascale Systems -- Evaluating AI-generated code for C++, Fortran, Go, Java, Julia, Matlab, Python, R, and Rust -- Investigating the Performance Difference of Task Communication via Futures or Side Effects -- GVEL: Fast Graph Loading in Edgelist and Compressed Sparse Row (CSR) formats -- Workshop preface -- Dynamic Resource Manager for Automating Deployments in the Computing Continuum -- Parallel Efficiency-aware Standard MPI-based Malleability -- The Impact of Evolving APGAS Programs on HPC Clusters -- Malleability in the Expand Ad-Hoc parallel file system -- Evaluation of a Dynamic Resource Management Strategy for Elastic Scientific Workflows -- MaM: A User-Friendly Interface to Incorporate Malleability into MPI Applications -- Towards a Scale Invariant Syntax for Dynamic Job-Level Workflows -- 22nd International Workshop on Algorithms, Models, and Tools for Parallel Computing on Heterogeneous Platforms (HeteroPar 2024) -- StarONNX: a Scheduler for Efficient Inference on Heterogeneous Resources -- Strategies for memory management improvement in deep learning algorithms for contrast enhancement of high-resolution radiological images -- Computing DTWs on CPU, GPU and FPGA with SYCL -- Challenging Portability Paradigms: FPGA Acceleration Using SYCL and OpenCL -- A Practical Survey on Static Task Scheduling Optimization Approaches for Heterogeneous Architectures -- Element scheduling for GPU-accelerated finite-volumes computations -- Containerization for Heterogeneous and Hybrid Parallelism -- A Chapel-based Multi-GPU Branch-and-Bound Algorithm -- Accelerating Scientific Computing Kernels by Fusing the Polyhedral and Tensor Compilers -- Exploring the Limits of Cross-Platform Sparse Tensor Processing. 330 $aThe two-volume set LNCS 15385 + 15386 constitutes the proceedings of the workshops and associated events that were held in conjunction with the 30th European Conference on Parallel and Distributed Processing, Euro-Par 2024, which took place in Madrid, Spain, during August 26?30, 2024. Overall, the Euro-Par Workshops received a total of 84 submissions of which 60 were accepted for presentation. They stem from the following workshops: ? The 1st European Workshop on Quantum Computing for High-Performance Computing (EUROQHPC 2024) ? The 19th Workshop on Virtualization in High-Performance Cloud Computing (VHPC 2024) ? The 1st Workshop in High-Performance Computing in Physics (PHYSHPC 2024) ? The 4th Workshop on Asynchronous Many-Task Systems for Exascale (AMTE 2024) ? The 3rd EuroHPC Workshop on Dynamic Resources in HPC (DYNRESHPC 2024) ? The 22nd International Workshop on Algorithms, Models and Tools for Parallel Computing on Heterogeneous Platforms (HETEROPAR 2024) ? The 1st Workshop on Next Steps in IoT-Edge-Cloud Continuum Evolution: Research and Practice (IECCONT 2024) ? The 1st Workshop about High-Performance e-Science (HIPES 2024) ? The 2nd International Workshop on Scalable Compute Continuum (WSCC 2024) In addition, the proceedings contain 14 poster and demo papers that have been accepted from 30 submissions, and 18 contributions in the PhD Symposium track that were accepted from 22 submissions. . 410 0$aLecture Notes in Computer Science,$x1611-3349 ;$v15385 606 $aComputer input-output equipment 606 $aMicroprogramming 606 $aMicroprocessors 606 $aComputer architecture 606 $aComputer networks 606 $aComputers, Special purpose 606 $aInput/Output and Data Communications 606 $aControl Structures and Microprogramming 606 $aProcessor Architectures 606 $aComputer Communication Networks 606 $aSpecial Purpose and Application-Based Systems 615 0$aComputer input-output equipment. 615 0$aMicroprogramming. 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 0$aComputer networks. 615 0$aComputers, Special purpose. 615 14$aInput/Output and Data Communications. 615 24$aControl Structures and Microprogramming. 615 24$aProcessor Architectures. 615 24$aComputer Communication Networks. 615 24$aSpecial Purpose and Application-Based Systems. 676 $a004.6 700 $aCaino-Lores$b Silvina$01825719 701 $aZeinalipour$b Demetris$0885425 701 $aDoudali$b Thaleia Dimitra$01825720 701 $aSingh$b David E$01825721 701 $aGarzón$b Gracia Ester Martín$01825722 701 $aSousa$b Leonel$01825723 701 $aAndrade$b Diego$01825724 701 $aCucinotta$b Tommaso$01825725 701 $aD'Ambrosio$b Donato$01825726 701 $aDiehl$b Patrick$01355443 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a996664546603316 996 $aEuro-Par 2024: Parallel Processing Workshops$94402553 997 $aUNISA