LEADER 01753nam  2200385   450 
001 996575464403316
005 20231209095935.0
010   $a1-5044-5888-5
024 70$a10.1109/IEEESTD.2019.8782907
035   $a(CKB)4100000008867228
035   $a(NjHacI)994100000008867228
035   $a(EXLCZ)994100000008867228
100   $a20231209d2019      uy             0
101 0 $aeng
135   $aur|||||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$a2416-2019 - IEEE Standard for Power Modeling to Enable System-Level Analysis /$fIEEE
210  1$aPiscataway, NJ :$cIEEE,$d2019.
215   $a1 online resource (63 pages)
330   $aIn this standard, a parameterized and abstracted power model enabling system, software, and hardware intellectual property (IP)-centric power analysis and optimization are described. Concepts and constructs are defined for the development of parameterized, accurate, efficient, and complete power models for systems and hardware IP blocks usable for system power analysis and optimization. Process, voltage, and temperature (PVT) independence; power and thermal management interface; and workload and architecture parameterization are some of the concepts included.
606   $aPower electronics$xMathematical models
606   $aSystem analysis
606   $aIntellectual property
615  0$aPower electronics$xMathematical models.
615  0$aSystem analysis.
615  0$aIntellectual property.
676   $a621.317
801  0$bNjHacI
801  1$bNjHacl
906   $aDOCUMENT
912   $a996575464403316
996   $a2416-2019 - IEEE Standard for Power Modeling to Enable System-Level Analysis$92582553
997   $aUNISA