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010   $a0-7381-1214-3
024 7 $a10.1109/IEEESTD.1994.339591
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100   $a20231209d1994      uy             0
101 0 $aeng
135   $aur|||||||||||
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$a13213-1994 $eISO/IEC/IEEE international standard for information technology--microprocessor systems--Control and Status Registers (CSR) architecture for microcomputer buses /$fInstitute of Electrical and Electronics Engineers
210  1$aNew York, New York :$cIEEE,$d1994.
215   $a1 online resource
330   $aThe document structure and notation are described, and the objectives and scope of the CSR Architecture are outlined. Transition set requirements, node addressing, node architectures, unit architectures, and CSR definitions are set forth. The ROM specification and bus standard requirements are covered.
517   $a13213-1994 - ISO/IEC/IEEE International Standard for Information technology--Microprocessor systems--Control and Status Registers 
606   $aMicrocomputers$xBuses
615  0$aMicrocomputers$xBuses.
676   $a004.64
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906   $aDOCUMENT
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996   $a13213-1994$93654774
997   $aUNISA