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200 10$a1838-2019 - IEEE Standard for Test Access Architecture for Three-Dimensional Stacked Integrated Circuits /$fInstitute of Electrical and Electronics Engineers
210  1$aNew York, New York :$cIEEE,$d2020.
215   $a1 online resource (73 pages)
330   $aIEEE Std 1838 is a die-centric standard; it applies to a die that is intended to be part of a multi-die stack. This standard defines die-level features that, when compliant dies are brought together in a stack, comprise a stack-level architecture that enables transportation of control and data signals for the test of (1) intra-die circuitry and (2) inter-die interconnects in both (a) pre-stacking and (b) post-stacking situations, the latter for both partial and complete stacks in both pre-packaging, post-packaging, and board-level situations. The primary focus of inter-die interconnect technology addressed by this standard is through-silicon vias (TSVs); however, this does not preclude its use with other interconnect technologies such as wire-bonding.
606   $aMicrowave transmission lines$xStandards
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