LEADER 01616nam 2200349 450 001 996574841503316 005 20231211115035.0 010 $a1-5044-6355-2 024 7 $a10.1109/IEEESTD.2020.9034549 035 $a(CKB)5280000000208103 035 $a(NjHacI)995280000000208103 035 $a(EXLCZ)995280000000208103 100 $a20231211d2020 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$a1481-2019 - IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA) /$fInstitute of Electrical and Electronics Engineers 210 1$aNew York, New York :$cIEEE,$d2020. 215 $a1 online resource (641 pages) 330 $aWays for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed. 517 $a1481-2019 - IEEE Standard for Integrated Circuit 606 $aPrinted circuits$xDesign and construction 615 0$aPrinted circuits$xDesign and construction. 676 $a621.381531 801 0$bNjHacI 801 1$bNjHacl 906 $aDOCUMENT 912 $a996574841503316 996 $a1481-2019 - IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA)$92582702 997 $aUNISA