LEADER 01651nam 2200385 450 001 996574742303316 005 20231211115048.0 010 $a1-5044-6325-0 024 70$a10.1109/IEEESTD.2020.8967263 035 $a(CKB)5280000000208129 035 $a(NjHacI)995280000000208129 035 $a(EXLCZ)995280000000208129 100 $a20231211d2020 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$a2401-2019 IEEE Standard Format for LSI-Package-Board Interoperable Design /$fIEEE 210 1$aNew York :$cIEEE,$d2020. 215 $a1 online resource (293 pages) 330 $aA method is provided for specifying a common interoperable format for electronic systems design. The format provides a common way to specify information/data about the project management, netlists, components, design rules, and geometries used in the large-scale integration-package-board designs. The method provides the ability to make electronic systems a key consideration early in the design process; design tools can use it to seamlessly exchange information/data. 606 $aLarge scale systems 606 $aPrinted circuits$xDesign and construction 606 $aComputer networks 615 0$aLarge scale systems. 615 0$aPrinted circuits$xDesign and construction. 615 0$aComputer networks. 676 $a003 801 0$bNjHacI 801 1$bNjHacl 906 $aDOCUMENT 912 $a996574742303316 996 $a2401-2019 - IEEE Standard Format for LSI-Package-Board Interoperable Design$92581347 997 $aUNISA