LEADER 07809nam 22008415 450 001 996466168903316 005 20230406071323.0 010 $a3-540-32427-5 024 7 $a10.1007/11602569 035 $a(CKB)1000000000283673 035 $a(SSID)ssj0000318096 035 $a(PQKBManifestationID)11212482 035 $a(PQKBTitleCode)TC0000318096 035 $a(PQKBWorkID)10308271 035 $a(PQKB)11332313 035 $a(DE-He213)978-3-540-32427-0 035 $a(MiAaPQ)EBC3067882 035 $a(PPN)152075399 035 $a(EXLCZ)991000000000283673 100 $a20100328d2005 u| 0 101 0 $aeng 135 $aurnn#008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aHigh Performance Computing ? HiPC 2005$b[electronic resource] $e12th International Conference, Goa, India, December 18-21, 2005, Proceedings /$fedited by David A. Bader, Manish Parashar, V. Sridhar, Viktor K. Prasanna 205 $a1st ed. 2005. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2005. 215 $a1 online resource (XXVIII, 552 p.) 225 1 $aTheoretical Computer Science and General Issues,$x2512-2029 ;$v3769 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-540-30936-5 320 $aIncludes bibliographical references and index. 327 $aKeynote Addresses -- Data Confidentiality in Collaborative Computing -- Productivity in High Performance Computing -- A New Approach to Programming and Prototyping Parallel Systems -- The Changing Challenges of Collaborative Algorithmics -- Quantum Physics and the Nature of Computation -- Plenary Session - Best Papers -- Preemption Adaptivity in Time-Published Queue-Based Spin Locks -- Criticality Driven Energy Aware Speculation for Speculative Multithreaded Processors -- Session I - Algorithms -- Search-Optimized Suffix-Tree Storage for Biological Applications -- Cost-Optimal Job Allocation Schemes for Bandwidth-Constrained Distributed Computing Systems -- A Fault Recovery Scheme for P2P Metacomputers -- A Distributed Location Identification Algorithm for Ad hoc Networks Using Computational Geometric Methods -- A Symmetric Localization Algorithm for MANETs Based on Collapsing Coordinate Systems -- Session II - Applications -- Performance Study of LU Decomposition on the Programmable GPU -- PENCAPS: A Parallel Application for Electrode Encased Grounding Systems Project -- Application of Reduce Order Modeling to Time Parallelization -- Orthogonal Decision Trees for Resource-Constrained Physiological Data Stream Monitoring Using Mobile Devices -- Throughput Computing with Chip MultiThreading and Clusters -- Session III - Architecture -- Supporting MPI-2 One Sided Communication on Multi-rail InfiniBand Clusters: Design Challenges and Performance Benefits -- High Performance RDMA Based All-to-All Broadcast for InfiniBand Clusters -- Providing Full QoS Support in Clusters Using Only Two VCs at the Switches -- Offloading Bloom Filter Operations to Network Processor for Parallel Query Processing in Cluster of Workstations -- A High-Speed VLSI Array Architecture for Euclidean Metric-Based Hausdorff Distance Measures Between Images -- Session IV - Applications -- Sensor Selection Heuristic in Sensor Networks -- Mobile Pipelines: Parallelizing Left-Looking Algorithms Using Navigational Programming -- Distributed Point Rendering -- An Intra-task DVS Algorithm Exploiting Program Path Locality for Real-Time Embedded Systems -- Advanced Resource Management and Scheduling of Workflow Applications in JavaSymphony -- Session V - Systems Software -- Using Clustering to Address Heterogeneity and Dynamism in Parallel Scientific Applications -- Data and Computation Abstractions for Dynamic and Irregular Computations -- XCAT-C++: Design and Performance of a Distributed CCA Framework -- The Impact of Noise on the Scaling of Collectives: A Theoretical Approach -- Extensible Parallel Architectural Skeletons -- Session VI - Communication Networks -- An Efficient Distributed Algorithm for Finding Virtual Backbones in Wireless Ad-Hoc Networks -- A Novel Battery Aware MAC Protocol for Minimizing Energy × Latency in Wireless Sensor Networks -- On the Power Optimization and Throughput Performance of Multihop Wireless Network Architectures -- A Novel Solution for Time Synchronization in Wireless Ad Hoc and Sensor Networks -- An Algorithm for Boundary Discovery in Wireless Sensor Networks -- Session VII - Architecture -- A Low-Complexity Issue Queue Design with Speculative Pre-execution -- Performance and Power Evaluation of an Intelligently Adaptive Data Cache -- Neural Confidence Estimation for More Accurate Value Prediction -- The Potential of On-Chip Multiprocessing for QCD Machines -- Low-Power 32bit×32bit Multiplier Design with Pipelined Block-Wise Shutdown -- Session VIII - Communication Networks -- Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System -- Improved Point-to-Point and Collective Communication Performance with Output-Queued High-Radix Routers -- A Clustering and Traffic-Redistribution Scheme for High-Performance IPsec VPNs -- WDM Multistage Interconnection Networks Architectures for Enhancing Supernetworks Switching Infrastructure -- Learning-TCP: A Novel Learning Automata Based Congestion Window Updating Mechanism for Ad hoc Wireless Networks -- Session IX - Algorithms -- Design and Implementation of the HPCS Graph Analysis Benchmark on Symmetric Multiprocessors -- Scheduling Multiple Flows on Parallel Disks -- Snap-Stabilizing Detection of Cutsets -- Scheduling Divisible Loads with Return Messages on Heterogeneous Master-Worker Platforms -- Session X - Systems and Networks -- A Grid Authentication System with Revocation Guarantees -- Integrating a New Cluster Assignment and Scheduling Algorithm into an Experimental Retargetable Code Generation Framework -- Cooperative Instruction Scheduling with Linear Scan Register Allocation -- iSCSI Analysis System and Performance Improvement of iSCSI Sequential Access in High Latency Networks. 410 0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v3769 606 $aMicroprocessors 606 $aComputer architecture 606 $aSoftware engineering 606 $aComputer engineering 606 $aComputer networks 606 $aAlgorithms 606 $aComputer science 606 $aComputer science?Mathematics 606 $aProcessor Architectures 606 $aSoftware Engineering 606 $aComputer Engineering and Networks 606 $aAlgorithms 606 $aTheory of Computation 606 $aMathematics of Computing 615 0$aMicroprocessors. 615 0$aComputer architecture. 615 0$aSoftware engineering. 615 0$aComputer engineering. 615 0$aComputer networks. 615 0$aAlgorithms. 615 0$aComputer science. 615 0$aComputer science?Mathematics. 615 14$aProcessor Architectures. 615 24$aSoftware Engineering. 615 24$aComputer Engineering and Networks. 615 24$aAlgorithms. 615 24$aTheory of Computation. 615 24$aMathematics of Computing. 676 $a004.1/1 702 $aBader$b David A$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aParashar$b Manish$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aSridhar$b V$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aPrasanna$b Viktor K$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aInternational Conference on High Performance Computing 906 $aBOOK 912 $a996466168903316 996 $aHigh Performance Computing – HiPC 2005$9771991 997 $aUNISA