LEADER 07064nam 22007815 450 001 996466143303316 005 20200703040643.0 010 $a3-540-44786-5 024 7 $a10.1007/3-540-60294-1 035 $a(CKB)1000000000234332 035 $a(SSID)ssj0000323124 035 $a(PQKBManifestationID)11272569 035 $a(PQKBTitleCode)TC0000323124 035 $a(PQKBWorkID)10305734 035 $a(PQKB)10937155 035 $a(DE-He213)978-3-540-44786-3 035 $a(PPN)155163965 035 $a(EXLCZ)991000000000234332 100 $a20121227d1995 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aField-Programmable Logic and Applications$b[electronic resource] $e5th International Workshop, FPL '95, Oxford, United Kingdom, August 29 - September 1, 1995. Proceedings /$fedited by Will Moore, Wayne Luk 205 $a1st ed. 1995. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d1995. 215 $a1 online resource (XII, 456 p.) 225 1 $aLecture Notes in Computer Science,$x0302-9743 ;$v975 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-540-60294-1 327 $aThe design of a new FPGA architecture -- Migration of a dual granularity globally interconnected PLD architecture to a 0.5? TLM process -- Self-timed FPGA systems -- The XC6200 FastMap? processor interface -- The Teramac configurable compute engine -- Telecommunication-oriented FPGA and dedicated CAD system -- A configurable logic processor for machine vision -- Extending DSP-boards with FPGA-based structures of interconnection -- High-speed region detection and labeling using an FPGA-based custom computing platform -- Using FPGAS as control support in MIMD executions -- Customised hardware based on the REDOC III algorithm for high performance data ciphering -- Using reconfigurable hardware to speed up product development and performance -- Creation of hardware objects in a reconfigurable computer -- Rapid hardware prototyping of Digital Signal Processing systems using Field Programmable Gate Arrays -- Delay minimal mapping of RTL structures onto LUT based FPGAs -- Some notes on power management on FPGA-based systems -- An automatic technique for realising user interaction processing in PLD based systems -- Proper use of hierarchy in HDL-based high density FGPA design -- Compiling regular arrays onto FPGAs -- Compiling Ruby into FPGAs -- The CSYN verilog compiler and other tools -- A VHDL design methodology for FPGAs -- VHDL-based rapid hardware prototyping using FPGA technology -- Integer programming for partitioning in software oriented codesign -- Test standard serves dual role as on-board programming solution -- Advanced method for industry related education with an FPGA design self-learning kit -- FPGA implementation of a rational adder -- FPLD-implementation of computations over finite fields GF(2m) with applications to error control coding -- Implementation of Fast Fourier Transforms and Discrete Cosine Transforms in FPGAs -- Implementation of a 2-D fast Fourier transform on an FPGA-based custom computing machine -- An assessment of the suitability of FPGA-based systems for use in digital signal processing -- An FPGA prototype for a multiplierless FIR filter built using the logarithmic number system -- Bit-serial FIR filters with CSD coefficients for FPGAs -- A self-validating temperature sensor implemented in FPGAs -- Developing interface libraries for reconfigurable data acquisition boards -- Prototype generation of application specific embedded controllers for microsystems -- A hardware genetic algorithm for the traveling salesman problem on Splash 2 -- Modular architecture for real-time astronomical image processing with FPGA -- A programmable I/O system for real-time AC drive control applications -- Reconfigurable logic for fault tolerance -- Supercomputing with reconfigurable architectures -- Automatic synthesis of parallel programs targeted to dynamically reconfigurable logic arrays -- Prototyping environment for dynamically reconfigurable logic -- Implementation approaches for reconfigurable logic applications -- Use of reconfigurability in variable-length code detection at video rates -- Classification and performance of reconfigurable architectures. 330 $aThis volume constitutes the proceedings of the Fifth International Workshop on Field-Programmable Logic and Its Applications, FPL '95, held in Oxford, UK in August/September 1995. The volume presents 46 full revised papers carefully selected by the program committee from a large number and wide range of submissions. The papers document the progress achieved since the predecessor conference (see LNCS 849). They are organized in sections on architectures, platforms, tools, arithmetic and signal processing, embedded systems and other applications, and reconfigurable design and models. 410 0$aLecture Notes in Computer Science,$x0302-9743 ;$v975 606 $aArchitecture, Computer 606 $aSoftware engineering 606 $aLogic design 606 $aElectronics 606 $aMicroelectronics 606 $aComputer-aided engineering 606 $aElectrical engineering 606 $aComputer System Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I13057 606 $aSoftware Engineering/Programming and Operating Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/I14002 606 $aLogic Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I12050 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 606 $aComputer-Aided Engineering (CAD, CAE) and Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I23044 606 $aCommunications Engineering, Networks$3https://scigraph.springernature.com/ontologies/product-market-codes/T24035 615 0$aArchitecture, Computer. 615 0$aSoftware engineering. 615 0$aLogic design. 615 0$aElectronics. 615 0$aMicroelectronics. 615 0$aComputer-aided engineering. 615 0$aElectrical engineering. 615 14$aComputer System Implementation. 615 24$aSoftware Engineering/Programming and Operating Systems. 615 24$aLogic Design. 615 24$aElectronics and Microelectronics, Instrumentation. 615 24$aComputer-Aided Engineering (CAD, CAE) and Design. 615 24$aCommunications Engineering, Networks. 676 $a621.39/5 702 $aMoore$b Will$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aLuk$b Wayne$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aInternational Workshop on Field-Programmable Logic and Applications 906 $aBOOK 912 $a996466143303316 996 $aField-programmable logic and applications$92106948 997 $aUNISA