LEADER 04174nam  22007815  450 
001 996466040903316
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010   $a3-540-47774-8
024 7 $a10.1007/3-540-60580-0
035   $a(CKB)1000000000016921
035   $a(SSID)ssj0000321998
035   $a(PQKBManifestationID)11243173
035   $a(PQKBTitleCode)TC0000321998
035   $a(PQKBWorkID)10282127
035   $a(PQKB)10980044
035   $a(DE-He213)978-3-540-47774-7
035   $a(PPN)155197371
035   $a(EXLCZ)991000000000016921
100   $a20121227d1995      u|             0
101 0 $aeng
135   $aurnn|008mamaa
181   $ctxt
182   $cc
183   $acr
200 14$aThe Complexity of Simple Computer Architectures$b[electronic resource] /$fedited by Silvia M. Müller, Wolfgang J. Paul
205   $a1st ed. 1995.
210  1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d1995.
215   $a1 online resource (XII, 273 p.) 
225 1 $aLecture Notes in Computer Science,$x0302-9743 ;$v995
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a3-540-60580-0 
327   $aThe formal architecture model -- Functional modules -- Hardwired control -- Design of a minimal CPU -- Design of the DLX machine -- Trade-off analyses -- Interrupt -- Microprogrammed control -- Further applications of the architecture model.
330   $aThis book presents a formal model for evaluating the cost effectiveness of computer architectures. The model can cope with a wide range of architectures, from CPU design to parallel supercomputers. To illustrate the formal procedure of trade-off analyses, several non-pipelined design alternatives for the well-known RISC architecture called DLX are analyzed quantitatively. It is formally proved that the interrupt mechanism proposed for the DLX architecture handles nested interrupts correctly. In an appendix all programs to compute the cost and cycle time of the designs described are listed in C code. Running these simple C programs on a PC is sufficient to verify the results presented. The book addresses design professionals and students in computer architecture.
410  0$aLecture Notes in Computer Science,$x0302-9743 ;$v995
606   $aMicroprogramming 
606   $aMicroprocessors
606   $aComputer system failures
606   $aArithmetic and logic units, Computer
606   $aElectronics
606   $aMicroelectronics
606   $aLogic design
606   $aControl Structures and Microprogramming$3https://scigraph.springernature.com/ontologies/product-market-codes/I12018
606   $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014
606   $aSystem Performance and Evaluation$3https://scigraph.springernature.com/ontologies/product-market-codes/I13049
606   $aArithmetic and Logic Structures$3https://scigraph.springernature.com/ontologies/product-market-codes/I12026
606   $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027
606   $aLogic Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I12050
615  0$aMicroprogramming .
615  0$aMicroprocessors.
615  0$aComputer system failures.
615  0$aArithmetic and logic units, Computer.
615  0$aElectronics.
615  0$aMicroelectronics.
615  0$aLogic design.
615 14$aControl Structures and Microprogramming.
615 24$aProcessor Architectures.
615 24$aSystem Performance and Evaluation.
615 24$aArithmetic and Logic Structures.
615 24$aElectronics and Microelectronics, Instrumentation.
615 24$aLogic Design.
676   $a004.2/2
700   $aMu?ller$b Silvia M$0746201
702   $aMüller$b Silvia M$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aPaul$b Wolfgang J$4edt$4http://id.loc.gov/vocabulary/relators/edt
906   $aBOOK
912   $a996466040903316
996   $aComplexity of simple computer architectures$91489183
997   $aUNISA