LEADER 07557nam 22007815 450 001 996465857503316 005 20200704231433.0 010 $a3-540-70670-4 024 7 $a10.1007/3-540-61730-2 035 $a(CKB)1000000000234521 035 $a(SSID)ssj0000323131 035 $a(PQKBManifestationID)11223081 035 $a(PQKBTitleCode)TC0000323131 035 $a(PQKBWorkID)10299227 035 $a(PQKB)11687950 035 $a(DE-He213)978-3-540-70670-0 035 $a(PPN)155189867 035 $a(EXLCZ)991000000000234521 100 $a20121227d1996 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aField-Programmable Logic, Smart Applications, New Paradigms and Compilers$b[electronic resource] $e6th International Workshop on Field-Programmable Logic and Applications, FPL '96, Darmstadt, Germany, September 23 - 25, Proceedings /$fedited by Reiner W. Hartenstein, Manfred Glesner 205 $a1st ed. 1996. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d1996. 215 $a1 online resource (X, 436 p.) 225 1 $aLecture Notes in Computer Science,$x0302-9743 ;$v1142 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-540-61730-2 327 $aPortable pipeline synthesis for FCCMs -- Performance-directed technology mapping for LUT-based FPGAs ? What role do decomposition and covering play? -- A framework for developing parametrised FPGA libraries -- FACT: Co-evaluation environment for FPGA architecture and CAD system -- An universal CLA adder generator for SRAM-based FPGAs -- An emulation system of the WASMII: A data driven computer on a virtual hardware -- Costum computing machines vs. Hardware/Software Co-Design: From a globalized point of view -- The design of a coprocessor board using Xilinx's XC6200 FPGA ? An experience report -- RACE: Reconfigurable and adaptive computing environment -- Computing 2-D DFTs using FPGAs -- CAPpartx: Computer aided prototyping partitioning for Xilinx FPGAs, a hierarchical partitioning tool for rapid prototyping -- Architectural synthesis and efficient circuit implementation for field programmable gate arrays -- RaPiD ? Reconfigurable pipelined datapath -- Solving satisfiability problems on FPGAs -- FPGA implementation of the block-matching algorithm for motion estimation in image coding -- Parallel CRC computation in FPGAs -- Coherent demodulation with FPGAs -- The Trianus system and its application to custom computing -- Logic synthesis for FPGAs using a mixed exclusive-/inclusive-OR form -- Flexible codesign target architecture for early prototyping of CMIST systems -- Attempt-1: A reconfigurable multiprocessor testbed -- A slow motion engine for the analysis of FPGA-based prototypes -- Implementing reconfigurable datapaths in FPGAs for adaptive filter design -- A fast constant coefficient multiplier for the XC6200 -- Key issues for user acceptance of FPGA design tools -- Reconfigurable DSP demonstrators for the development of spacecraft payload processors -- Reconfigurable logic based fibre channel network card with sub 2 ?s raw latency -- An asynchronous transfer mode (ATM) stream demultiplexer and switch -- Optically reconfigurable FPGAs: Is this a future trend? -- CCSimP ? An instruction-level costum-configurable processor for FPLDs -- Architectural synthesis techniques for dynamically reconfigurable logic -- Fast reconfigurable crossbar switching in FPGAs -- Growable FPGA macro generator -- Architectural strategies for implementing an image processing algorithm on XC6000 FPGA -- A virtual hardware operating system for the Xilinx XC6200 -- An experimental programmable environment for prototyping digital circuits -- Migration from schematic-based designs to a VHDL synthesis environment -- ASIC design and FPGA design: A unified design methodology applied to different technologies -- FIR filtering with FPGAs using quadrature sigma-delta modulation encoding -- A new FPGA technology mapping approach by cluster merging -- An EPLD based transient recorder for simulation of video signal processing devices in a VHDL environment close to system level conditions -- Convolutional error decoding with FPGAs -- Metastability characteristics testing for programmable logic design -- Implementing ?? modulator prototype designs on an FPGA -- Design of a VME parameterized library for FPGAs -- Development of a telephone answering machine in a lab ? FPGAs in Education -- FPGA design migration: Some remarks -- Concurrent design of hardware/software dedicated systems -- The implementation of a field programmable logic based co-processor for the acceleration of discrete event simulators -- Computing weight distributions of binary linear block codes on a CCM. 330 $aThis book constitutes the refereed proceedings of the 6th International Workshop of Field-Programmable Logic and Applications, FPL '96, held in Darmstadt, Germany, in September 1996. The 37 revised full papers presented in the book are selected from 82 submissions originating from 27 countries; also included are 13 high-quality poster presentations. The book is divided into topical sections on high-level design, new software and hardware development tools, custom computers, applications, hardware/software co-design, AISC emulators, vendor session, industrial applications and experiences, reconfiguration aspects, CAD user experiences, and miscellaneous. 410 0$aLecture Notes in Computer Science,$x0302-9743 ;$v1142 606 $aArchitecture, Computer 606 $aLogic design 606 $aMicroprocessors 606 $aComputational complexity 606 $aComputer-aided engineering 606 $aElectronics 606 $aMicroelectronics 606 $aComputer System Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I13057 606 $aLogic Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I12050 606 $aRegister-Transfer-Level Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I12069 606 $aComplexity$3https://scigraph.springernature.com/ontologies/product-market-codes/T11022 606 $aComputer-Aided Engineering (CAD, CAE) and Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I23044 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 615 0$aArchitecture, Computer. 615 0$aLogic design. 615 0$aMicroprocessors. 615 0$aComputational complexity. 615 0$aComputer-aided engineering. 615 0$aElectronics. 615 0$aMicroelectronics. 615 14$aComputer System Implementation. 615 24$aLogic Design. 615 24$aRegister-Transfer-Level Implementation. 615 24$aComplexity. 615 24$aComputer-Aided Engineering (CAD, CAE) and Design. 615 24$aElectronics and Microelectronics, Instrumentation. 676 $a621.39/5 702 $aHartenstein$b Reiner W$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aGlesner$b Manfred$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aInternational Workshop on Field-Programmable Logic and Applications 906 $aBOOK 912 $a996465857503316 996 $aField-Programmable Logic, Smart Applications, New Paradigms and Compilers$92829958 997 $aUNISA