LEADER 04408nam 22008415 450 001 996465838303316 005 20200702123055.0 010 $a1-280-38670-3 010 $a9786613564627 010 $a3-642-13217-0 024 7 $a10.1007/978-3-642-13217-9 035 $a(CKB)2670000000028925 035 $a(SSID)ssj0000446328 035 $a(PQKBManifestationID)11249868 035 $a(PQKBTitleCode)TC0000446328 035 $a(PQKBWorkID)10492144 035 $a(PQKB)11623808 035 $a(DE-He213)978-3-642-13217-9 035 $a(MiAaPQ)EBC3065411 035 $a(PPN)149063466 035 $a(EXLCZ)992670000000028925 100 $a20100615d2010 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aBeyond Loop Level Parallelism in OpenMP: Accelerators, Tasking and More$b[electronic resource] /$fedited by Mitsuhisa Sato, Toshihiro Hanawa, Matthias S. Müller, Barbara Chapman, Bronis R. de Supinski 205 $a1st ed. 2010. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2010. 215 $a1 online resource (187 p. 121 illus.) 225 1 $aProgramming and Software Engineering ;$v6132 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-642-13216-2 320 $aIncludes bibliographical references and index. 327 $aSixth International Workshop on OpenMP IWOMP 2010 -- Enabling Low-Overhead Hybrid MPI/OpenMP Parallelism with MPC -- A ROSE-Based OpenMP 3.0 Research Compiler Supporting Multiple Runtime Libraries -- Binding Nested OpenMP Programs on Hierarchical Memory Architectures -- A Proposal for User-Defined Reductions in OpenMP -- An Extension to Improve OpenMP Tasking Control -- Towards an Error Model for OpenMP -- How OpenMP Applications Get More Benefit from Many-Core Era -- Topology-Aware OpenMP Process Scheduling -- How to Reconcile Event-Based Performance Analysis with Tasking in OpenMP -- Fuzzy Application Parallelization Using OpenMP -- Hybrid Parallel Programming on SMP Clusters Using XPFortran and OpenMP -- A Case for Including Transactions in OpenMP -- OMPCUDA : OpenMP Execution Framework for CUDA Based on Omni OpenMP Compiler. 410 0$aProgramming and Software Engineering ;$v6132 606 $aComputer communication systems 606 $aArchitecture, Computer 606 $aMicroprocessors 606 $aAlgorithms 606 $aSoftware engineering 606 $aComputers 606 $aComputer Communication Networks$3https://scigraph.springernature.com/ontologies/product-market-codes/I13022 606 $aComputer System Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I13057 606 $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014 606 $aAlgorithm Analysis and Problem Complexity$3https://scigraph.springernature.com/ontologies/product-market-codes/I16021 606 $aSoftware Engineering$3https://scigraph.springernature.com/ontologies/product-market-codes/I14029 606 $aComputation by Abstract Devices$3https://scigraph.springernature.com/ontologies/product-market-codes/I16013 607 $aTsukuba <2010>$2swd 615 0$aComputer communication systems. 615 0$aArchitecture, Computer. 615 0$aMicroprocessors. 615 0$aAlgorithms. 615 0$aSoftware engineering. 615 0$aComputers. 615 14$aComputer Communication Networks. 615 24$aComputer System Implementation. 615 24$aProcessor Architectures. 615 24$aAlgorithm Analysis and Problem Complexity. 615 24$aSoftware Engineering. 615 24$aComputation by Abstract Devices. 676 $a005.275 702 $aSato$b Mitsuhisa$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aHanawa$b Toshihiro$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aMüller$b Matthias S$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aChapman$b Barbara$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $ade Supinski$b Bronis R$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aIWOMP 2010 906 $aBOOK 912 $a996465838303316 996 $aBeyond Loop Level Parallelism in OpenMP: Accelerators, Tasking and More$92830746 997 $aUNISA