LEADER 06379nam 22008175 450 001 996465559003316 005 20200703214729.0 010 $a3-540-36126-X 024 7 $a10.1007/3-540-36126-X 035 $a(CKB)1000000000211828 035 $a(SSID)ssj0000323225 035 $a(PQKBManifestationID)11224772 035 $a(PQKBTitleCode)TC0000323225 035 $a(PQKBWorkID)10296902 035 $a(PQKB)10570731 035 $a(DE-He213)978-3-540-36126-8 035 $a(MiAaPQ)EBC3071690 035 $a(PPN)155230476 035 $a(EXLCZ)991000000000211828 100 $a20121227d2002 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt 182 $cc 183 $acr 200 10$aFormal Methods in Computer-Aided Design$b[electronic resource] $e4th International Conference, FMCAD 2002, Portland, OR, USA, November 6-8, 2002, Proceedings /$fedited by Mark D. Aagaard, John W. O'Leary 205 $a1st ed. 2002. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2002. 215 $a1 online resource (XII, 408 p.) 225 1 $aLecture Notes in Computer Science,$x0302-9743 ;$v2517 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-540-00116-6 320 $aIncludes bibliographical references and index. 327 $aAbstraction -- Abstraction by Symbolic Indexing Transformations -- Counter-Example Based Predicate Discovery in Predicate Abstraction -- Automated Abstraction Refinement for Model Checking Large State Spaces Using SAT Based Conflict Analysis -- Symbolic Simulation -- Simplifying Circuits for Formal Verification Using Parametric Representation -- Generalized Symbolic Trajectory Evaluation ? Abstraction in Action -- Model Checking: Strongly-Connected Components -- Analysis of Symbolic SCC Hull Algorithms -- Sharp Disjunctive Decomposition for Language Emptiness Checking -- Microprocessor Specification and Verification -- Relating Multi-step and Single-Step Microprocessor Correctness Statements -- Modeling and Verification of Out-of-Order Microprocessors in UCLID -- Decision Procedures -- On Solving Presburger and Linear Arithmetic with SAT -- Deciding Presburger Arithmetic by Model Checking and Comparisons with Other Methods -- Qubos: Deciding Quantified Boolean Logic Using Propositional Satisfiability Solvers -- Model Checking: Reachability Analysis -- Exploiting Transition Locality in the Disk Based Mur? Verifier -- Traversal Techniques for Concurrent Systems -- Model Checking: Fixed Points -- A Fixpoint Based Encoding for Bounded Model Checking -- Using Edge-Valued Decision Diagrams for Symbolic Generation of Shortest Paths -- Verification Techniques and Methodology -- Mechanical Verification of a Square Root Algorithm Using Taylor?s Theorem -- A Specification and Verification Framework for Developing Weak Shared Memory Consistency Protocols -- Model Checking the Design of an Unrestricted, Stuck-at Fault Tolerant, Asynchronous Sequential Circuit Using SMV -- Hardware Description Languages -- Functional Design Using Behavioural and Structural Components -- Compiling Hardware Descriptions with Relative Placement Information for Parametrised Libraries -- Prototyping and Synthesis -- Input/Output Compatibility of Reactive Systems -- Smart Play-out of Behavioral Requirements. 330 $aThis volume contains the proceedings of the Fourth Biennial Conference on F- mal Methods in Computer-Aided Design (FMCAD). The conference is devoted to the use of mathematical methods for the analysis of digital hardware c- cuits and systems. The workreported in this bookdescribes the use of formal mathematics and associated tools to design and verify digital hardware systems. Functional veri?cation has become one of the principal costs in a modern computer design e?ort. FMCAD provides a venue for academic and industrial researchers and practitioners to share their ideas and experiences of using - screte mathematical modeling and veri?cation. Over the past 20 years, this area has grown from just a few academic researchers to a vibrant worldwide com- nity of people from both academia and industry. This volume includes 23 papers selected from the 47 submitted papers, each of which was reviewed by at least three program committee members. The history of FMCAD dates backto 1984, when the earliest meetings on this topic occurred as part of IFIP WG10.2. 410 0$aLecture Notes in Computer Science,$x0302-9743 ;$v2517 606 $aComputer-aided engineering 606 $aComputer hardware 606 $aSoftware engineering 606 $aComputer logic 606 $aMathematical logic 606 $aElectrical engineering 606 $aComputer-Aided Engineering (CAD, CAE) and Design$3https://scigraph.springernature.com/ontologies/product-market-codes/I23044 606 $aComputer Hardware$3https://scigraph.springernature.com/ontologies/product-market-codes/I1200X 606 $aSoftware Engineering$3https://scigraph.springernature.com/ontologies/product-market-codes/I14029 606 $aLogics and Meanings of Programs$3https://scigraph.springernature.com/ontologies/product-market-codes/I1603X 606 $aMathematical Logic and Formal Languages$3https://scigraph.springernature.com/ontologies/product-market-codes/I16048 606 $aElectrical Engineering$3https://scigraph.springernature.com/ontologies/product-market-codes/T24000 615 0$aComputer-aided engineering. 615 0$aComputer hardware. 615 0$aSoftware engineering. 615 0$aComputer logic. 615 0$aMathematical logic. 615 0$aElectrical engineering. 615 14$aComputer-Aided Engineering (CAD, CAE) and Design. 615 24$aComputer Hardware. 615 24$aSoftware Engineering. 615 24$aLogics and Meanings of Programs. 615 24$aMathematical Logic and Formal Languages. 615 24$aElectrical Engineering. 676 $a621.39/2 702 $aAagaard$b Mark D$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aO'Leary$b John W$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aFMCAD 2002 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a996465559003316 996 $aFormal Methods in Computer-Aided Design$91891319 997 $aUNISA