LEADER 03891nam 22005175 450 001 996465465603316 005 20200703095136.0 010 $a3-030-50061-6 024 7 $a10.1007/978-3-030-50061-0 035 $a(CKB)4100000011325519 035 $a(MiAaPQ)EBC6271281 035 $a(DE-He213)978-3-030-50061-0 035 $a(PPN)248596306 035 $a(EXLCZ)994100000011325519 100 $a20200630d2020 u| 0 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aAnalog IC Placement Generation via Neural Networks from Unlabeled Data$b[electronic resource] /$fby António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins 205 $a1st ed. 2020. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2020. 215 $a1 online resource (96 pages) 225 1 $aSpringerBriefs in Applied Sciences and Technology,$x2191-530X 311 $a3-030-50060-8 320 $aIncludes bibliographical references. 327 $aIntroduction -- Related Work: Machine Learning and Electronic Design Automation -- Unlabeled Data and Artificial Neural Networks -- Placement Loss: Placement Constraints Description and Satisfiability Evaluation -- Experimental Results in Industrial Case Studies -- Conclusions. . 330 $aIn this book, innovative research using artificial neural networks (ANNs) is conducted to automate the placement task in analog integrated circuit layout design, by creating a generalized model that can generate valid layouts at push-button speed. Further, it exploits ANNs? generalization and push-button speed prediction (once fully trained) capabilities, and details the optimal description of the input/output data relation. The description developed here is chiefly reflected in two of the system?s characteristics: the shape of the input data and the minimized loss function. In order to address the latter, abstract and segmented descriptions of both the input data and the objective behavior are developed, which allow the model to identify, in newer scenarios, sub-blocks which can be found in the input data. This approach yields device-level descriptions of the input topology that, for each device, focus on describing its relation to every other device in the topology. By means of these descriptions, an unfamiliar overall topology can be broken down into devices that are subject to the same constraints as a device in one of the training topologies. In the experimental results chapter, the trained ANNs are used to produce a variety of valid placement solutions even beyond the scope of the training/validation sets, demonstrating the model?s effectiveness in terms of identifying common components between newer topologies and reutilizing the acquired knowledge. Lastly, the methodology used can readily adapt to the given problem?s context (high label production cost), resulting in an efficient, inexpensive and fast model. . 410 0$aSpringerBriefs in Applied Sciences and Technology,$x2191-530X 606 $aMachine learning 606 $aMachine Learning$3https://scigraph.springernature.com/ontologies/product-market-codes/I21010 615 0$aMachine learning. 615 14$aMachine Learning. 676 $a621.3815 700 $aGusmão$b António$4aut$4http://id.loc.gov/vocabulary/relators/aut$0981950 702 $aHorta$b Nuno$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aLourenço$b Nuno$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aMartins$b Ricardo$4aut$4http://id.loc.gov/vocabulary/relators/aut 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a996465465603316 996 $aAnalog IC Placement Generation via Neural Networks from Unlabeled Data$92241073 997 $aUNISA