LEADER 01169cam0-2200313---450- 001 990005660120403321 005 20100208153624.0 035 $a000566012 035 $aFED01000566012 035 $a(Aleph)000566012FED01 035 $a000566012 100 $a19990604d1955----km-y0itay50------ba 101 0 $afre$aara 102 $aFR 105 $ay-------001yy 200 1 $aMélanges de philosophie juive et arabe$eextraits mèthodiques de la Source de vie de Salomon Ibn-Gebirol$fpar S. Munk$gtraduits en français sur la version hèbranque de Schemm-Tob Ibn-Falaquèra 205 $aNouvelle Tdition 210 $aParis$cLibrarie Philosophique J. Vrin$d1955 215 $aVIII, 532 p. ca.$d23 cm 225 1 $aBibliothèque d'histoire de la philosophie 300 $aLe 72 pagine n.n. contengono il testo in ebraico degli "Extraits methodiques de la "Source de vie" d'Ibn-Gebirol" 700 1$aMunk,$bSalomon$0189637 801 0$aIT$bUNINA$gRICA$2UNIMARC 901 $aBK 912 $a990005660120403321 952 $aNON CONSULTABILE$bIST.ST.FIL. 3430$fFLFBC 959 $aFLFBC 996 $aMélanges de philosophie juive et arabe$9600730 997 $aUNINA LEADER 08679nam 22007815 450 001 996465379503316 005 20200707015529.0 010 $a3-540-30102-X 024 7 $a10.1007/b100354 035 $a(CKB)1000000000212539 035 $a(DE-He213)978-3-540-30102-8 035 $a(SSID)ssj0000098341 035 $a(PQKBManifestationID)11130953 035 $a(PQKBTitleCode)TC0000098341 035 $a(PQKBWorkID)10132481 035 $a(PQKB)11088150 035 $a(MiAaPQ)EBC3087273 035 $a(PPN)155228188 035 $a(EXLCZ)991000000000212539 100 $a20121227d2004 u| 0 101 0 $aeng 135 $aurnn|008mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aAdvances in Computer Systems Architecture$b[electronic resource] $e9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings /$fedited by Pen-Chung Yew, Jingling Xue 205 $a1st ed. 2004. 210 1$aBerlin, Heidelberg :$cSpringer Berlin Heidelberg :$cImprint: Springer,$d2004. 215 $a1 online resource (XVIII, 602 p.) 225 1 $aLecture Notes in Computer Science,$x0302-9743 ;$v3189 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a3-540-23003-3 327 $aKeynote Address I -- Some Real Observations on Virtual Machines -- Session 1A: Cache and Memory -- Replica Victim Caching to Improve Reliability of In-Cache Replication -- Efficient Victim Mechanism on Sector Cache Organization -- Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy -- Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures -- Session 1B: Reconfigurable and Embedded Architectures -- A Configurable System-on-Chip Architecture for Embedded Devices -- An Auto-adaptative Reconfigurable Architecture for the Control -- Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory -- Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System -- Session 2A: Processor Architecture and Design I -- Architecture Design of a High-Performance 32-Bit Fixed-Point DSP -- TengYue-1: A High Performance Embedded SoC -- A Fault-Tolerant Single-Chip Multiprocessor -- Session 2B: Power and Energy Management -- Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy -- dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization -- High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption -- Session 3A: Processor Architecture and Design II -- Dynamic Reallocation of Functional Units in Superscalar Processors -- Multiple-Dimension Scalable Adaptive Stream Architecture -- Impact of Register-Cache Bandwidth Variation on Processor Performance -- Session 3B: Compiler and Operating System Issues -- Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling -- Continuous Adaptive Object-Code Re-optimization Framework -- Initial Evaluation of a User-Level Device Driver Framework -- Keynote Address II -- A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To? -- Session 4A: Application-Specific Systems -- A Cost-Effective Supersampling for Full Scene AntiAliasing -- A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2 m ) -- Scalable Design Framework for JPEG2000 System Architecture -- Real-Time Three Dimensional Vision -- Session 4B: Interconnection Networks -- A Router Architecture for QoS Capable Clusters -- Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability -- Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube -- A Two-Level On-Chip Bus System Based on Multiplexers -- Keynote Address III -- Make Computers Cheaper and Simpler -- Session 5A: Prediction Techniques -- A Low Power Branch Predictor to Selectively Access the BTB -- Static Techniques to Improve Power Efficiency of Branch Predictors -- Choice Predictor for Free -- Performance Impact of Different Data Value Predictors -- Session 5B: Parallel Architecture and Programming -- Heterogeneous Networks of Workstations -- Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays -- Order Independent Transparency for Image Composition Parallel Rendering Machines -- An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments -- Session 6A: Microarchitecture Design and Evaluations -- Validating Word-Oriented Processors for Bit and Multi-word Operations -- Dynamic Fetch Engine for Simultaneous Multithreaded Processors -- A Novel Rename Register Architecture and Performance Analysis -- Session 6B: Memory and I/O Systems -- A New Hierarchy Cache Scheme Using RAM and Pagefile -- An Object-Oriented Data Storage System on Network-Attached Object Devices -- A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory -- Session 7A: Potpourri -- A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking -- A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel -- Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. 330 $aOn behalf of the program committee, we were pleased to present this year?s program for ACSAC: Asia-Paci?c Computer Systems Architecture Conference. Now in its ninth year, ACSAC continues to provide an excellent forum for researchers, educators and practitioners to come to the Asia-Paci?c region to exchange ideas on the latest developments in computer systems architecture. This year, the paper submission and review processes were semiautomated using the free version of CyberChair. We received 152 submissions, the largest number ever.Eachpaperwasassignedatleastthree,mostlyfour,andinafewcaseseven ?ve committee members for review. All of the papers were reviewed in a t- monthperiod,duringwhichtheprogramchairsregularlymonitoredtheprogress of the review process. When reviewers claimed inadequate expertise, additional reviewers were solicited. In the end, we received a total of 594 reviews (3.9 per paper) from committee members as well as 248 coreviewers whose names are acknowledged in the proceedings. We would like to thank all of them for their time and e?ort in providing us with such timely and high-quality reviews, some of them on extremely short notice. 410 0$aLecture Notes in Computer Science,$x0302-9743 ;$v3189 606 $aArchitecture, Computer 606 $aArithmetic and logic units, Computer 606 $aInput-output equipment (Computers) 606 $aMicroprocessors 606 $aComputer communication systems 606 $aComputer System Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I13057 606 $aArithmetic and Logic Structures$3https://scigraph.springernature.com/ontologies/product-market-codes/I12026 606 $aInput/Output and Data Communications$3https://scigraph.springernature.com/ontologies/product-market-codes/I12042 606 $aRegister-Transfer-Level Implementation$3https://scigraph.springernature.com/ontologies/product-market-codes/I12069 606 $aComputer Communication Networks$3https://scigraph.springernature.com/ontologies/product-market-codes/I13022 606 $aProcessor Architectures$3https://scigraph.springernature.com/ontologies/product-market-codes/I13014 615 0$aArchitecture, Computer. 615 0$aArithmetic and logic units, Computer. 615 0$aInput-output equipment (Computers). 615 0$aMicroprocessors. 615 0$aComputer communication systems. 615 14$aComputer System Implementation. 615 24$aArithmetic and Logic Structures. 615 24$aInput/Output and Data Communications. 615 24$aRegister-Transfer-Level Implementation. 615 24$aComputer Communication Networks. 615 24$aProcessor Architectures. 676 $a004.2/2 702 $aYew$b Pen-Chung$4edt$4http://id.loc.gov/vocabulary/relators/edt 702 $aXue$b Jingling$4edt$4http://id.loc.gov/vocabulary/relators/edt 712 12$aACSAC (Asia-Pacific Computer Systems Architecture Conference) 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a996465379503316 996 $aAdvances in Computer Systems Architecture$9772404 997 $aUNISA LEADER 01733oam 2200445M 450 001 9910716422303321 005 20200213070542.6 035 $a(CKB)5470000002521925 035 $a(OCoLC)1065860665 035 $a(OCoLC)995470000002521925 035 $a(EXLCZ)995470000002521925 100 $a20071213d1927 ua 0 101 0 $aeng 135 $aurcn||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aConsideration of S. 4808, to establish a Federal Farm Board. February 14, 1927. -- Referred to the House Calendar and ordered to be printed 210 1$a[Washington, D.C.] :$c[U.S. Government Printing Office],$d1927. 215 $a1 online resource (1 pages) 225 1 $aHouse report / 69th Congress, 2nd session. House ;$vno. 2072 225 1 $a[United States congressional serial set] ;$v[serial no. 8690] 300 $aBatch processed record: Metadata reviewed, not verified. Some fields updated by batch processes. 300 $aFDLP item number not assigned. 606 $aAdvisory boards 606 $aAgriculture$xEconomic aspects 606 $aSurplus agricultural commodities 608 $aLegislative materials.$2lcgft 615 0$aAdvisory boards. 615 0$aAgriculture$xEconomic aspects. 615 0$aSurplus agricultural commodities. 701 $aSnell$b Bertrand Hollis$f1870-1958$pRepublican (NY)$01388514 801 0$bWYU 801 1$bWYU 801 2$bOCLCO 801 2$bOCLCQ 906 $aBOOK 912 $a9910716422303321 996 $aConsideration of S. 4808, to establish a Federal Farm Board. February 14, 1927. -- Referred to the House Calendar and ordered to be printed$93548241 997 $aUNINA