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010   $a3-319-75178-6
024 7 $a10.1007/978-3-319-75178-8
035   $a(CKB)4100000002485484
035   $a(DE-He213)978-3-319-75178-8
035   $a(MiAaPQ)EBC5592506
035   $a(PPN)224637789
035   $a(EXLCZ)994100000002485484
100   $a20180207d2018      u|             0
101 0 $aeng
135   $aurnn|008mamaa
181   $ctxt$2rdacontent
182   $cc$2rdamedia
183   $acr$2rdacarrier
200 10$aEuro-Par 2017: Parallel Processing Workshops$b[electronic resource] $eEuro-Par 2017 International Workshops, Santiago de Compostela, Spain, August 28-29, 2017, Revised Selected Papers /$fedited by Dora B. Heras, Luc Bougé, Gabriele Mencagli, Emmanuel Jeannot, Rizos Sakellariou, Rosa M. Badia, Jorge G. Barbosa, Laura Ricci, Stephen L. Scott, Stefan Lankes, Josef Weidendorfer
205   $a1st ed. 2018.
210  1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2018.
215   $a1 online resource (XVIII, 751 p. 247 illus.) 
225 1 $aTheoretical Computer Science and General Issues,$x2512-2029 ;$v10659
311   $a3-319-75177-8 
330   $aThis book constitutes the proceedings of the workshops of the 23rd International Conference on Parallel and Distributed Computing, Euro-Par 2017, held in Santiago de Compostela. Spain in August 2017.   The 59 full papers presented were carefully reviewed and selected from 119 submissions. Euro-Par is an annual, international conference in Europe, covering all aspects of parallel and distributed processing. These range from theory to practice, from small to the largest parallel and distributed systems and infrastructures, from fundamental computational problems to full-edged applications, from architecture, compiler, language and interface design and implementation to tools, support infrastructures, and application performance aspects.
410  0$aTheoretical Computer Science and General Issues,$x2512-2029 ;$v10659
606   $aElectronic digital computers?Evaluation
606   $aMicroprocessors
606   $aComputer architecture
606   $aComputer networks
606   $aComputers, Special purpose
606   $aOperating systems (Computers)
606   $aLogic design
606   $aSystem Performance and Evaluation
606   $aProcessor Architectures
606   $aComputer Communication Networks
606   $aSpecial Purpose and Application-Based Systems
606   $aOperating Systems
606   $aLogic Design
615  0$aElectronic digital computers?Evaluation.
615  0$aMicroprocessors.
615  0$aComputer architecture.
615  0$aComputer networks.
615  0$aComputers, Special purpose.
615  0$aOperating systems (Computers).
615  0$aLogic design.
615 14$aSystem Performance and Evaluation.
615 24$aProcessor Architectures.
615 24$aComputer Communication Networks.
615 24$aSpecial Purpose and Application-Based Systems.
615 24$aOperating Systems.
615 24$aLogic Design.
676   $a004.071
702   $aHeras$b Dora B$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aBougé$b Luc$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aMencagli$b Gabriele$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aJeannot$b Emmanuel$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aSakellariou$b Rizos$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aBadia$b Rosa M$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aBarbosa$b Jorge G$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aRicci$b Laura$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aScott$b Stephen L$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aLankes$b Stefan$4edt$4http://id.loc.gov/vocabulary/relators/edt
702   $aWeidendorfer$b Josef$4edt$4http://id.loc.gov/vocabulary/relators/edt
801  0$bMiAaPQ
801  1$bMiAaPQ
801  2$bMiAaPQ
906   $aBOOK
912   $a996465301603316
996   $aEuro-Par 2017: Parallel Processing Workshops$92069904
997   $aUNISA