LEADER 00780nam 2200265 450 001 996361742803316 005 20201029110211.0 100 $a20201029d1989----km y0itay5003 ba 101 0 $aeng 102 $aUS 105 $ay 00 y 200 1 $aReading rhetoric rhetorically$eIsocrates and the marketing of insight$fMichael Cahn 210 1$a[S.l.]$c[s.n.]$d1989 215 $a121-144 p.$d18 cm 300 $aEstratto da: Rhetorica, vol. 7., n. 2 (1989). 600 0$aIsocrate$xRetorica$2BNCF 676 $a885.01 700 1$aCAHN,$bMichael$0616074 801 0$aIT$bcba$gREICAT 912 $a996361742803316 951 $aXV.8.Misc. 460$b274774 L.M.$cXV.8.$d453355 959 $aBK 969 $aFSO 996 $aReading rhetoric rhetorically$91759840 997 $aUNISA LEADER 02215nam 2200481 450 001 9910271009603321 005 20230809225037.0 010 $a1-119-04601-7 010 $a1-119-04599-1 035 $a(CKB)3710000001633623 035 $a(DLC) 2017011202 035 $a(Au-PeEL)EBL4915580 035 $a(CaPaEBR)ebr11412608 035 $a(CaONFJC)MIL1021882 035 $a(OCoLC)974912967 035 $a(MiAaPQ)EBC4915580 035 $a(EXLCZ)993710000001633623 100 $a20170811h20172017 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $2rdacontent 182 $2rdamedia 183 $2rdacarrier 200 10$aSiP-system in package design and simulation $eMentorGraphics Expedition Enterprise Flow advanced design guide /$fSuny Li 210 1$aHoboken, New Jersey ;$aFusionopolis, Solaris South Tower, Singapore :$cPublishing House of Electronics Industry :$cWiley,$d2017. 210 4$dİ2017 215 $a1 online resource 311 $a1-119-04593-2 320 $aIncludes bibliographical references and indexes. 327 $aSiP design and simulation platform -- Basic knowledge of package -- SiP production process -- New package technologies -- SiP design and simulation flow -- Central library -- Schematic input -- Multi-board project management and schematic concurrent design -- Layout creation and setting -- Constraint rules management -- Wire bond design -- Cavity and chip stack design -- FlipChip and RDL design -- Route and plane -- Embedded passives design -- RF circuit design -- Layout concurrent design -- 3D real-time DRC -- Design review -- Manufacture data output -- SiP simulation technology. 606 $aIntegrated circuits$xDesign and construction 606 $aMultichip modules (Microelectronics)$xDesign and construction 615 0$aIntegrated circuits$xDesign and construction. 615 0$aMultichip modules (Microelectronics)$xDesign and construction. 676 $a621.3815 700 $aLi$b Suny$f1974-$0874373 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910271009603321 996 $aSiP-system in package design and simulation$91952290 997 $aUNINA