LEADER 01467nam 2200373 450 001 996280550803316 005 20171017102821.0 010 $a0-7381-5238-2 035 $a(CKB)3450000000138495 035 $a(WaSeSS)IndRDA00078965 035 $a(NjHacI)993450000000138495 035 $a(EXLCZ)993450000000138495 100 $a20171017d2006 || | 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 00$aIEEE standard for a high-performance serial bus$hAmendment 3 210 1$aNew York :$cIEEE,$d2006. 215 $a1 online resource (99 pages) 311 $a0-7381-5237-4 330 $aSupplemental information for a high-speed serial bus that integrates well with most IEEE standard 32-bit and 64-bit parallel buses is specified. It is intended to extend the usefulness of a low-cost interconnect between external peripherals. This standard follows the IEEE Std 1212-2001 command and status register (CSR) architecture. 606 $aMicrocomputers$xBuses$xStandards 606 $aMicrocomputers$xDesign and construction$xStandards 615 0$aMicrocomputers$xBuses$xStandards. 615 0$aMicrocomputers$xDesign and construction$xStandards. 676 $a004.1 801 0$bWaSeSS 801 1$bWaSeSS 906 $aDOCUMENT 912 $a996280550803316 996 $aIEEE standard for a high-performance serial bus$92580581 997 $aUNISA