LEADER 01732oam 2200433zu 450 001 996280511303316 005 20210807000255.0 010 $a0-7381-1641-6 035 $a(CKB)1000000000035791 035 $a(SSID)ssj0000996559 035 $a(PQKBManifestationID)12452096 035 $a(PQKBTitleCode)TC0000996559 035 $a(PQKBWorkID)10988023 035 $a(PQKB)10865245 035 $a(WaSeSS)IndRDA00077871 035 $a(NjHacI)991000000000035791 035 $a(EXLCZ)991000000000035791 100 $a20160829d1999 uy 101 0 $aeng 135 $aur||||||||||| 181 $ctxt 182 $cc 183 $acr 200 00$aIEEE Standard VHDL Analog and Mixed-Signal Extensions 210 31$a[Place of publication not identified]$cIEEE$d1999 215 $a1 online resource (303 pages) 225 0 $aInstitute of Electrical and Electronics Engineers 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a0-7381-1640-8 320 $aIncludes bibliographical references. 330 $aThis standard defines the IEEE 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDL-AMS, is built on IEEE Std 1076-1993 (VHDL) and extends it with additions and changes to provide capabilities of writing and simulating analog and mixed-signal models. 606 $aComputer hardware description languages 615 0$aComputer hardware description languages. 676 $a621.392 801 0$bPQKB 906 $aDOCUMENT 912 $a996280511303316 996 $aIEEE Standard VHDL Analog and Mixed-Signal Extensions$92576480 997 $aUNISA