LEADER 01386nam2-2200445---450- 001 990006134820203316 005 20160418155023.0 010 $a84-7100-196-9$b(rústica) 010 $a84-7100-196-9$b(cartoné) 035 $a000613482 035 $aUSA01000613482 035 $a(ALEPH)000613482USA01 035 $a000613482 100 $a20160111d1992----km-y0itay50------ba 101 $aspa 102 $aES 105 $a||||||||001yy 200 1 $a<> expulsión de los judíos de España$fLuis Suárez Fernández 205 $a2. ed. 210 $aMadrid$cEditorial Mapfre$d1992 215 $a361 p.$d23 cm 225 2 $aColecciones Mapfre 1492. Sefarad$v1 410 0$1001000613481$aColecciones Mapfre 1492. Sefarad$v, 1 454 1$12001 606 $xStoria 606 $aSpagna$xRelazioni etniche 700 1$aSUÁREZ FERNÁNDEZ,$bLuis$0403073 801 0$aIT$bsalbc$gISBD 912 $a990006134820203316 951 $aVI.7. COLL.12/ 1$b190 ISLA 959 $aBK 969 $aUMA 979 $aMARANO$b90$c20160323$lUSA01$h0857 979 $aMARANO$b90$c20160323$lUSA01$h0900 979 $aMARANO$b90$c20160323$lUSA01$h1154 979 $aMARANO$b90$c20160406$lUSA01$h0935 979 $aMARANO$b90$c20160406$lUSA01$h0936 979 $aPATRY$b90$c20160418$lUSA01$h1550 996 $aExpulsión de los judíos de España$91385640 997 $aUNISA LEADER 02424nam 2200397 450 001 996280327703316 005 20230419112901.0 010 $a1-5386-0352-7 035 $a(CKB)4340000000130449 035 $a(NjHacI)994340000000130449 035 $a(EXLCZ)994340000000130449 100 $a20230419d2017 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$a2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS) /$fInstitute of Electrical and Electronics Engineers ; Panepiste?mio Athe?no?n, contributor 210 1$aPiscataway, N.J. :$cIEEE,$d2017. 215 $a1 online resource $cillustrations 311 $a1-5386-0353-5 320 $aIncludes bibliographical references. 330 $aOn line testing and more generally design for robustness, are important in modern electronic systems. These needs increased dramatically with the introduction of nanometer technologies, which impact adversely noise margins process, voltage and temperature variations aging and wear out soft error and EMI sensitivity and power density and make mandatory the use of design for robustness techniques for extending, yield, reliability, and lifetime of modern SoCs Design for reliability is also mandatory for reducing power dissipation, as reducing voltage for reducing power strongly affects reliability by reducing noise margins and thus the sensitivity to soft errors and EMI, and by increasing circuit delays which increase sensitivity to timing faults Design for Security is also strongly related with Design for Reliability, as security attacks are often fault based IOLTS is an established forum for presenting novel ideas and experimental data on these areas. 517 $a2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design 606 $aElectronic circuit design$vCongresses 606 $aError-correcting codes (Information theory) 615 0$aElectronic circuit design 615 0$aError-correcting codes (Information theory) 676 $a621.3815 702 $aAthe?no?n$b Panepiste?mio 801 0$bNjHacI 801 1$bNjHacl 906 $aPROCEEDING 912 $a996280327703316 996 $a2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS)$92513248 997 $aUNISA