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100   $a20160829d1998      uy              
101 0 $aeng
181   $ctxt
182   $cc
183   $acr
200 00$aInnovative architecture for future generation high-performance processors and systems : October 22-24, 1997, Maui, Hawaii
210 31$a[Place of publication not identified]$cIEEE Computer Society$d1998
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-8186-8424-0 
606   $aHigh performance computing$vCongresses
606   $aHigh performance processors$vCongresses
606   $aComputer architecture$vCongresses
606   $aEngineering & Applied Sciences$2HILCC
606   $aComputer Science$2HILCC
615  0$aHigh performance computing
615  0$aHigh performance processors
615  0$aComputer architecture
615  7$aEngineering & Applied Sciences
615  7$aComputer Science
676   $a004.2/2
702   $aJoe$b Kazuki
702   $aJoe$b Kazuki
702   $aVeidenbaum$b Alex
702   $aVeidenbaum$b Alex
712 02$aUniversity of Illinois at Urbana-Champaign
712 02$aNational Science Foundation (U.S.)
712 12$aInternational Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems$f(1997 :$eMaui, Hawaii)
801  0$bPQKB
906   $aBOOK
912   $a996217797003316
996   $aInnovative architecture for future generation high-performance processors and systems : October 22-24, 1997, Maui, Hawaii$92321904
997   $aUNISA