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101 0 $aeng
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200 10$a18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : proceedings : 3-5 November, 2003, Boston, Massachusetts
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d2003
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-7695-2042-1 
606   $aIntegrated circuits$xDesign and construction$xVery large scale integration$vCongresses
606   $aFault-tolerant computing$vCongresses
606   $aElectrical & Computer Engineering$2HILCC
606   $aElectrical Engineering$2HILCC
606   $aEngineering & Applied Sciences$2HILCC
615  0$aIntegrated circuits$xDesign and construction$xVery large scale integration
615  0$aFault-tolerant computing
615  7$aElectrical & Computer Engineering
615  7$aElectrical Engineering
615  7$aEngineering & Applied Sciences
702   $aBolchini$b Cristiana
712 02$aIEEE Computer Society Fault-Tolerant Computing Technical Committee.
712 02$aIEEE Computer Society Test Technology Technical Committee
712 12$aIEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
801  0$bPQKB
906   $aPROCEEDING
912   $a996214789603316
996   $a18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems : proceedings : 3-5 November, 2003, Boston, Massachusetts$92378645
997   $aUNISA