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035   $a(PQKBManifestationID)12201515
035   $a(PQKBTitleCode)TC0000558972
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100   $a20160829d1994      uy              
101 0 $aeng
135   $aur|||||||||||
181   $ctxt
182   $cc
183   $acr
200 00$aVLSI Test Symposium, 12th IEEE
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d1994
215   $a1 online resource (488 pages)
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-8186-5440-6 
330   $aProceedings of the symposium held in Cherry Hill, New Jersey, April 1994. Technical sessions are devoted to synthesis and testability; testable mixed-signal circuit designs; built-in self-test; test generation and fault simulation; on-line testing; defect coverage and test quality; advanced test generation techniques; high-level mixed-signal test issues; delay fault testing; testing regular structures; design verification and manufacturing validation; IDDQ testing and bridging faults; testability concepts and applications; and fault modeling. No index. Acidic paper. Annotation copyright by Book News, Inc., Portland, OR.
606   $aIntegrated circuits$xVery large scale integration$xTesting$vCongresses
615  0$aIntegrated circuits$xVery large scale integration$xTesting
676   $a621.3815
801  0$bPQKB
906   $aBOOK
912   $a996206157103316
996   $aVLSI Test Symposium, 12th IEEE$92526398
997   $aUNISA