LEADER 03405oam 2200421zu 450 001 996203436603316 005 20210807000238.0 010 $a1-5386-0233-4 035 $a(CKB)1000000000022752 035 $a(SSID)ssj0000394687 035 $a(PQKBManifestationID)12170513 035 $a(PQKBTitleCode)TC0000394687 035 $a(PQKBWorkID)10387125 035 $a(PQKB)11477943 035 $a(NjHacI)991000000000022752 035 $a(EXLCZ)991000000000022752 100 $a20160829d2005 uy 101 0 $aeng 135 $aur||||||||||| 181 $ctxt 182 $cc 183 $acr 200 00$aProceedings of the 2005 3rd workshop on embedded systems for real time multimedia 210 31$a[Place of publication not identified]$cIEEE$d2005 215 $a1 online resource (140 pages) $cillustrations 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a0-7803-9347-3 327 $aNext generation of system architectures for tele-immersive environments,"K. -- Design of multimillion-gate multimedia SoCs: where do we stand?,"S. -- Frame buffer compression using a limited-size code book for low-power display systems,"Hojun -- A perception-aware low-power software audio decoder for portable devices,"S. -- A data discarding framework for reducing the energy consumption of Viterbi decoder in decoding broadcasted wireless multi-resolution JPEG2000 images,"Feng -- Addressing computational and networking constraints to enable video streaming from wireless appliances,"S. -- Energy analysis of multimedia watermarking on mobile handheld devices,"A. -- A NUCA model for embedded systems cache design,"P. -- Dynamic time-slot allocation for QoS enabled networks on chip,"T. -- Custom processor design using NISC: a case-study on DCT algorithm,"B. -- Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing,"D. -- An integrated CAD tool for ASIC implementation of multiplierless FIR filters with common sub-expression elimination optimization,"Qiu-zhong -- Data-access optimization of embedded systems through selective inlining transformation,"M. -- Operation shuffling for low energy L0 cluster generation on heterogeneous VLIW processors,"Y. -- JPEG encoding on the Intel MXP5800: a platform-based design case study,"A. -- A component-based approach for MPSoC SW design: experience with OS customization for H.264 decoder,"A. -- An interface for the design and implementation of dynamic applications on multi-processor architectures,"J. -- A data oriented approach to the design of reconfigurable stream decoders,"G. -- Scratchpad sharing strategies for multiprocess embedded systems: a first approach,"M. -- Combining data and instruction memory energy optimizations for embedded applications,"T. -- Workload characterization and cost-quality tradeoffs in MPEG-4 decoding on resource-constrained devices,"Yanhong -- Characterizing and exploiting task load variability and correlation for energy management in multi core systems,"S. 606 $aEmbedded computer systems$vCongresses 615 0$aEmbedded computer systems 676 $a004.16 702 $aMiranda$b Miguel 702 $aHa$b Soonhoi 801 0$bPQKB 906 $aPROCEEDING 912 $a996203436603316 996 $aProceedings of the 2005 3rd workshop on embedded systems for real time multimedia$92347203 997 $aUNISA