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200 10$aProceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing : (MTDT 2002) : 10-12 July, 2002, Isle of Bendor, France
210 31$a[Place of publication not identified]$cIEEE Computer Society$d2002
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-7695-1617-3 
606   $aSemiconductor storage devices$xTesting$vCongresses
606   $aRandom access memory$vCongresses
606   $aElectrical & Computer Engineering$2HILCC
606   $aEngineering & Applied Sciences$2HILCC
606   $aElectrical Engineering$2HILCC
615  0$aSemiconductor storage devices$xTesting
615  0$aRandom access memory
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615  7$aEngineering & Applied Sciences
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712 02$aIEEE Computer Society
712 02$aIEEE Computer Society Technical Council on Test Technology.
712 02$aIEEE Computer Society Technical Committee on VLSI,
712 12$aIEEE International Workshop on Memory Technology, Design and Testing
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996   $aProceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing : (MTDT 2002) : 10-12 July, 2002, Isle of Bendor, France$92372861
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