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100   $a20160829d1994      uy              
101 0 $aeng
135   $aur|||||||||||
181   $ctxt
182   $cc
183   $acr
200 00$aDefect and Fault-Tolerance in VLSI Systems, 1994 Workshop On
210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d1994
215   $a1 online resource (304 pages)
300   $aBibliographic Level Mode of Issuance: Monograph
311   $a0-8186-6307-3 
330   $aContains 32 papers and a speech from the October 1994 workshop. Topics of discussion include fault tolerance architectures, testable architectures, yield and defect models, laser processes for defect correction, self-checking and coding techniques, fault-tolerant techniques, yield enhancement, reconfiguration in 3D meshes, and testing techniques. Lacks an index. Annotation copyright by Book News, Inc., Portland, OR.
606   $aFault-tolerant computing$vCongresses
606   $aIntegrated circuits$xVery large scale integration$xDesign and construction$vCongresses
615  0$aFault-tolerant computing
615  0$aIntegrated circuits$xVery large scale integration$xDesign and construction
676   $a004.2
801  0$bPQKB
906   $aBOOK
912   $a996198229503316
996   $aDefect and Fault-Tolerance in VLSI Systems, 1994 Workshop On$92531429
997   $aUNISA