LEADER 01604nam0-2200541---450- 001 990000064750203316 005 20060818162215.0 010 $a1-86094-040-4 035 $a0006475 035 $aUSA010006475 035 $a(ALEPH)000006475USA01 035 $a0006475 100 $a20000914d1997----|||y0itay0103----ba 101 0 $aeng 102 $aGB 105 $a||||||||001yy 200 1 $aTolerance design of electronic circuits$fRobert Spence, Randeep Singh Soin 210 $aLondon$cImperial College Press$dcopyr. 1997 215 $aXIII, 215 p.$d24 cm. 410 0$12001 454 1$12001 461 1$1001-------$12001 610 $aCircuiti elettronici$xProgettazione 676 $a621. 3815 700 1$aSPENCE,$bRobert$0339761 701 1$aSINGH SOIN,$bRandeep$0746516 801 $aIT$bSALBC$gISBD 912 $a990000064750203316 951 $a621. 3815 SPE$b13460 Ing.$c621.3815$d00000066 951 $aMF/94$b1928$cMF 959 $aBK 969 $aDIMEC 969 $aTEC 979 $c20000914$lUSA01$h1730 979 $c20001019$lUSA01$h1055 979 $c20001019$lUSA01$h1453 979 $c20001019$lUSA01$h1500 979 $c20001019$lUSA01$h1538 979 $c20001024$lUSA01$h1514 979 $c20001027$lUSA01$h1518 979 $c20001027$lUSA01$h1522 979 $c20001110$lUSA01$h1709 979 $c20001124$lUSA01$h1207 979 $c20020403$lUSA01$h1614 979 $aPATRY$b90$c20040406$lUSA01$h1606 979 $aDIMEC$b90$c20060818$lUSA01$h1622 996 $aTolerance design of electronic circuits$91490145 997 $aUNISA