LEADER 00926nam0 2200265 450 001 000004818 005 20030708113131.0 100 $a20030708d1998----km-y0itay50------ba 101 0 $aita 102 $aIT 200 1 $a<>rilevazioni di contabilità industriale$fGiuseppe Paolone, Luciano D'Amico, Riccardo Palumbo 210 $aBari$cCacucci$d1998 215 $a334 p.$cgraf.$d25 cm 225 2 $a<>rilevazioni economico-amministrative d'azienda$v3 410 0$12001$a<>rilevazioni economico-amministrative d'azienda 610 1 $aAziende industriali$aContabilità 676 $a657.86 700 1$aPaolone,$bGiuseppe$0110348 701 1$aPalumbo,$bRiccardo$0118009 701 1$aD'Amico,$bLuciano$027877 801 0$aIT $bUNIPARTHENOPE $gRICA $2UNIMARC 912 $a000004818 951 $cNAVA1$a657/R/26$b35914$d20030710 996 $aRilevazioni di contabilità industriale$91205912 997 $aUNIPARTHENOPE LEADER 01429nam 2200325 450 001 996559972603316 005 20231205191950.0 010 $a979-88-557-0216-3 035 $a(CKB)28534578700041 035 $a(NjHacI)9928534578700041 035 $a(EXLCZ)9928534578700041 100 $a20231205d2023 uy 0 101 0 $aeng 135 $aur||||||||||| 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$a63055-2023 - IEEE/IEC International Standard--Format for LSI-Package-Board Interoperable design /$fIEEE 210 1$aNew York, USA :$cIEEE,$d2023. 215 $a1 online resource (298 pages) 330 $aA method is provided for specifying a common interoperable format for electronic systems design. The format provides a common way to specify information-data about the project management, netlists, components, design rules, and geometries used in the large-scale integration-package-board designs. The method provides the ability to make electronic systems a key consideration early in the design process; design tools can use it to seamlessly exchange information-data. 606 $aPrinted circuits$xDesign and construction 615 0$aPrinted circuits$xDesign and construction. 676 $a621.3 801 0$bNjHacI 801 1$bNjHacl 906 $aBOOK 912 $a996559972603316 996 $a63055-2023 - IEEE$93589745 997 $aUNISA