LEADER 01134nam2 22002771i 450 001 UON00286616 005 20231205103903.840 100 $a20070116d1979 |0itac50 ba 101 $apol 102 $aPL 105 $a|||| 1|||| 200 1 $aProby teatralne$fKostanty Idelfons Galczynski 210 $aWarszawa$cCzytelnik$d1979 215 $a726 p.$d22 cm. 311 $aVol. 3$9UON00286608 461 0$1001UON00286608$12001 $aDziela w pieciu tomach$fKonstanty Ildefons Galczynski; red. Kira Galczynska, Barbara Kowalska$1210 $aWarszawa$cCzytelnik$d1979$1215 $a5 v.$d22 cm.$vVol. 3 620 $aPL$dWarszawa$3UONL000573 676 $a891.85$cLetteratura polacca$v21 700 1$aGALCZYNSKI$bKonstanty Ildefons$3UONV165225$0634700 712 $aCzytelnik$3UONV256601$4650 801 $aIT$bSOL$c20240220$gRICA 899 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$2UONSI 912 $aUON00286616 950 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$dSI POLACCO A GAL 0006 $eSI EO 25086 5 0006 996 $aProby teatralne$91181448 997 $aUNIOR LEADER 03355oam 2200661I 450 001 9910966527603321 005 20240313055747.0 010 $a1-04-022174-2 010 $a0-429-11283-1 010 $a981-4364-03-7 024 7 $a10.1201/b13063 035 $a(CKB)2670000000272706 035 $a(EBL)1044824 035 $a(OCoLC)815735348 035 $a(SSID)ssj0000778850 035 $a(PQKBManifestationID)11452212 035 $a(PQKBTitleCode)TC0000778850 035 $a(PQKBWorkID)10768693 035 $a(PQKB)10918343 035 $a(Au-PeEL)EBL1044824 035 $a(CaPaEBR)ebr10611469 035 $a(CaONFJC)MIL694607 035 $a(OCoLC)892793676 035 $a(OCoLC)1280140882 035 $a(FINmELB)ELB145440 035 $a(MiAaPQ)EBC1044824 035 $a(EXLCZ)992670000000272706 100 $a20180331d2013 uy 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 00$aCMOS nanoelectronics $einnovative devices, architectures, and applications /$fedited by Nadine Collaert 205 $a1st ed. 210 $aBoca Raton, Fla. $cPan Standford Pub.$d2012 210 1$aSingapore :$cPan Stanford Pub.,$d2013. 215 $a1 online resource (444 p.) 300 $aDescription based upon print version of record. 311 08$a1-322-63325-8 311 08$a981-4364-02-9 320 $aIncludes bibliographical references. 327 $aFront Cover; Contents; Preface; I. Integration of Multi-Gate Devices (FinFET); 1. Introduction to Multi-Gate Devices and Integration Challenges; 2. Dry Etching Patterning Requirements for Multi-Gate Devices; 3. High-k Dielectrics and Metal Gate Electrodes on SOI MuGFETs; 4. Doping, Contact and Strain Architectures for Highly Scaled FinFETs; II. Circuit-Related Aspects; 5. Variability and Its Implications for FinFET SRAM; 6. Specific Features of MuGFETs at High Temperatures over a Wide Frequency Range; 7. ESD Protection in FinFET Technology; III. Exploratory Devices and Characterization Tools 327 $a8. The Junctionless Nanowire Transistor9. The Variational Principle: A Valuable Ally Assisting the Self-Consistent Solution of Poisson's Equation and Semi-Classical Transport Equations; 10. New Tools for the Direct Characterisation of FinFETS; 11. Dopant Metrology in Advanced FinFETs 330 $aThis book covers one of the most important device architectures that have been widely researched to extend the transistor scaling: FinFET. Starting with theory, the book discusses the advantages and the integration challenges of this device architecture. It addresses in detail the topics such as high-density fin patterning, gate stack design, and source/drain engineering, which have been considered challenges for the integration of FinFETs. The book also addresses circuit-related aspects, including the impact of variability on SRAM design, ESD design, and high-T operation. It discusses a new d 606 $aMolecular electronics 606 $aNanotechnology 615 0$aMolecular electronics. 615 0$aNanotechnology. 676 $a621.3815 701 $aCollaert$b Nadine$01828771 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910966527603321 996 $aCMOS nanoelectronics$94397692 997 $aUNINA