LEADER 03896nam 2200505 450 001 9910484267603321 005 20221005212814.0 010 $a3-030-68368-0 024 7 $a10.1007/978-3-030-68368-9 035 $a(CKB)4100000011794493 035 $a(DE-He213)978-3-030-68368-9 035 $a(MiAaPQ)EBC6512648 035 $a(Au-PeEL)EBL6512648 035 $a(OCoLC)1241732298 035 $a(PPN)254726623 035 $a(EXLCZ)994100000011794493 100 $a20211007d2021 fy 0 101 0 $aeng 135 $aurnn#---mamaa 181 $ctxt$2rdacontent 182 $cc$2rdamedia 183 $acr$2rdacarrier 200 10$aMitigating process variability and soft errors at circuit-level for FinFETs /$fAlexandra Zimpeck [et al.] 205 $a1st edition 2021. 210 1$aCham, Switzerland :$cSpringer,$d[2021] 210 4$dİ2021 215 $a1 online resource (XIII, 131 p. 89 illus., 86 illus. in color.) 311 1 $a3-030-68367-2 327 $aChapter 1. Introduction -- Chapter 2. FinFET Technology -- Chapter 3. Reliability Challenges in FinFETs -- Chapter 4. Circuit-Level Mitigation Approaches -- Chapter 5. Evaluation Methodology -- Chapter 6. Process Variability Mitigation -- Chapter 7. Soft Error Mitigation -- Chapter 8. General Trade-offs -- Chapter 9. Final Remarks. 330 $aThis book evaluates the influence of process variations (e.g. work-function fluctuations) and radiation-induced soft errors in a set of logic cells using FinFET technology, considering the 7nm technological node as a case study. Moreover, for accurate soft error estimation, the authors adopt a radiation event generator tool (MUSCA SEP3), which deals both with layout features and electrical properties of devices. The authors also explore four circuit-level techniques (e.g. transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor) as alternatives to attenuate the unwanted effects on FinFET logic cells. This book also evaluates the mitigation tendency when different levels of process variation, transistor sizing, and radiation particle characteristics are applied in the design. An overall comparison of all methods addressed by this work is provided allowing to trace a trade-off between the reliability gains and the design penalties of each approach regarding the area, performance, power consumption, single event transient (SET) pulse width, and SET cross-section. Explains how to measure the influence of process variability (e.g. work-function fluctuations) and radiation-induced soft errors in FinFET logic cells; Enables designers to improve the robustness of FinFET integrated circuits without focusing on manufacturing adjustments; Discusses the benefits and downsides of using circuit-level approaches such as transistor reordering, decoupling cells, Schmitt Trigger, and sleep transistor for mitigating the impact of process variability and soft errors; Evaluates the techniques described in the context of different test scenarios: distinct levels of process variations, transistor sizing, and different radiation features; Helps readers identify the best circuit design considering the target application and design requirements like area constraints or power/delay limitations. 606 $aField-effect transistors$xDesign and construction 606 $aField-effect transistors$xReliability 606 $aSoft errors (Computer science) 615 0$aField-effect transistors$xDesign and construction. 615 0$aField-effect transistors$xReliability. 615 0$aSoft errors (Computer science) 676 $a621.381528 700 $aZimpeck$b Alexandra$0851985 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910484267603321 996 $aMitigating process variability and soft errors at circuit-level for FinFETs$91902341 997 $aUNINA LEADER 01020nam0 22002651i 450 001 UON00138702 005 20231205102832.75 100 $a20020107d1962 |0itac50 ba 101 $amal 102 $aIN 105 $a|||| 1|||| 200 1 $aMulluvelikal$fSunny Kaipallimalil 210 $aMadras$cThe Christian Literature Society$d1962 215 $a108 p.$d18 cm 606 $aLETTERATURA MALAYALAM$3UONC031224$2FI 620 $aIN$dChennai$3UONL000058 686 $aSI VI MM$cSUBCONT. INDIANO - LETTERATURE DRAVIDICHE MINORI - MALAYALAM$2A 700 1$aKAIPALLIMALIL$bSunny$3UONV084316$0670923 712 $aChristian Literature society for India$3UONV250241$4650 801 $aIT$bSOL$c20240220$gRICA 899 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$2UONSI 912 $aUON00138702 950 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$dSI SI VI MM 231 $eSI SA 41398 5 231 996 $aMulluvelikal$91279930 997 $aUNIOR