LEADER 01515nam0 22003493i 450 001 MIL0073398 005 20231121125531.0 010 $a0387812024$bNew York. 010 $a3211812024 100 $a20141021d1973 ||||0itac50 ba 101 | $aeng 102 $aat 181 1$6z01$ai $bxxxe 182 1$6z01$an 200 1 $aIntroductory lectures on the finite element method$fOlgierd C. Zienkiewicz 210 $aWien$aNew York$cSpringer$d1973 215 $a98 p.$d24 cm. 225 | $aCourses and lectures$fInternational centre for mechanical sciences$v130 410 0$1001CFI0025604$12001 $aCourses and lectures$fInternational centre for mechanical sciences$v130$171202$aInternational centre for mechanical sciences$3UFIV001316 606 $aMetodo degli elementi finiti$2FIR$3RMLC377414$9I 676 $a620.001515353$9$v21 700 1$aZienkiewicz$b, Olgierd Cecil$3MILV021935$4070$021195 790 1$aZienkiewicz$b, Oleg C.$3MILV133735$zZienkiewicz, Olgierd Cecil 790 1$aZienkiewicz$b, O. C.$3UBOV021454$zZienkiewicz, Olgierd Cecil 801 3$aIT$bIT-01$c20141021 850 $aIT-FR0099 899 $aBiblioteca Area Ingegneristica$bFR0099 912 $aMIL0073398 950 0$aBiblioteca Area Ingegneristica$d 54DII 620.001 ZIE/2$e 54VM 0000413135 VM barcode:BAIN002392. - Inventario:2261DVM$fA $h20040316$i20121204 977 $a 54 996 $aIntroductory lectures on the finite element method$93609231 997 $aUNICAS LEADER 01076nam0 22002771i 450 001 UON00061275 005 20231205102308.329 100 $a20020107d1973 |0itac50 ba 101 $ahin 102 $aIN 105 $a|||| 1|||| 200 1 $aBardashta-bahara$fAchala Sharma 210 $aIlahabada$cNilabha Prakashana$d1973 215 $a135 p.; 18 cm 606 $aLETTERATURA HINDI$xNARRATIVA$xSEC. XX-XXI$3UONC004706$2FI 620 $aIN$dAllahabad$3UONL000114 686 $aSI VI CC$cSUBCONT. INDIANO - LETTERATURA HINDI - MODERNA E CONTEMPORANEA - POESIA$2A 700 1$aSHARMA$bAchala$3UONV077007$0655366 712 $aNilabha Prakashana$3UONV254812$4650 790 1$aSARMA, Acala$zSHARMA, Achala$3UONV039140 801 $aIT$bSOL$c20240220$gRICA 899 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$2UONSI 912 $aUON00061275 950 $aSIBA - SISTEMA BIBLIOTECARIO DI ATENEO$dSI SI VI Cc 460 $eSI IND3585 5 460 996 $aBardashta-bahara$91165960 997 $aUNIOR LEADER 09247oam 2200601zu 450 001 9911019226403321 005 20230421042348.0 010 $a1-280-55527-0 010 $a9786610555277 010 $a0-470-85251-8 010 $a0-470-84191-5 035 $a(CKB)1000000000019177 035 $a(SSID)ssj0000080516 035 $a(PQKBManifestationID)11126016 035 $a(PQKBTitleCode)TC0000080516 035 $a(PQKBWorkID)10096056 035 $a(PQKB)10767834 035 $a(MiAaPQ)EBC4957476 035 $a(Au-PeEL)EBL4957476 035 $a(CaONFJC)MIL55527 035 $a(OCoLC)1024235778 035 $a(NjHacI)991000000000019177 035 $a(EXLCZ)991000000000019177 100 $a20160829d1998 uy 101 0 $aeng 135 $aurcnu|||||||| 181 $ctxt 182 $cc 183 $acr 200 10$aSwitching Theory, Architectures and Performance in Broadband ATM Networks: Architectures and Performance in Broadband ATM Networks 210 31$a[Place of publication not identified]$cJohn Wiley & Sons Incorporated$d1998 215 $a1 online resource (423 pages) 300 $aBibliographic Level Mode of Issuance: Monograph 311 $a0-471-96338-0 327 $aPreface -- Chapter 1 Broadband Integrated Services Digital Network -- 1.1. Current Networking Scenario -- 1.1.1. Communication services -- 1.1.2. Networking issues -- 1.2. The Path to Broadband Networking -- 1.2.1. Network evolution through ISDN to B-ISDN -- 1.2.2. The protocol reference model -- 1.3. Transfer Mode and Control of the B-ISDN -- 1.3.1. Asynchronous time division multiplexing -- 1.3.2. Congestion control issues -- 1.4. Synchronous Digital Transmission -- 1.4.1. SDH basic features -- 1.4.2. SDH multiplexing structure -- 1.4.3. Synchronization by pointers -- 1.4.4. Mapping of SDH elements -- 1.5. The ATM Standard -- 1.5.1. Protocol reference model -- 1.5.2. The physical layer -- 1.5.3. The ATM layer -- 1.5.4. The ATM adaptation layer -- 1.5.4.1. AAL Type 1 -- 1.5.4.2. AAL Type 2 -- 1.5.4.3. AAL Type 3/4 -- 1.5.4.4. AAL Type 5 -- 1.5.4.5. AAL payload capacity -- 1.6. References -- 1.7. Problems -- Chapter 2 Interconnection Networks -- 2.1. Basic Network Concepts -- 2.1.1. Equivalence between networks -- 2.1.2. Crossbar network based on splitters and combiners -- 2.2. Full-connection Multistage Networks -- 2.3. Partial-connection Multistage Networks -- 2.3.1. Banyan networks -- 2.3.1.1. Banyan network topologies -- 2.3.1.2. Banyan network properties -- 2.3.2. Sorting networks -- 2.3.2.1. Merging networks -- 2.3.2.2. Sorting networks -- 2.4. Proof of Merging Schemes -- 2.4.1. Odd-even merge sorting -- 2.4.2. Bitonic merge sorting -- 2.5. References -- 2.6. Problems -- Chapter 3 Rearrangeable Networks -- 3.1. Full-connection Multistage Networks -- 3.2. Partial-connection Multistage Networks -- 3.2.1. Partially self-routing PC networks -- 3.2.1.1. Horizontal extension -- 3.2.1.2. Vertical replication -- 3.2.1.3. Vertical replication with horizontal extension -- 3.2.1.4. Bounds on PC rearrangeable networks -- 3.2.2. Fully self-routing PC networks -- 3.2.3. Fully self-routing PC networks with output multiplexing -- 3.3. Bounds on the Network Cost Function -- 3.4. References -- 3.5. Problems -- Chapter 4 Non-blocking Networks -- 4.1. Full-connection Multistage Networks -- 4.1.1. Two-stage network -- 4.1.2. Three-stage network -- 4.1.3. Recursive network construction -- 4.2. Partial-connection Multistage Networks -- 4.2.1. Vertical replication -- 4.2.2. Vertical replication with horizontal extension -- 4.2.3. Link dilation -- 4.2.4. EGS networks -- 4.3. Comparison of Non-blocking Networks -- 4.4. Bounds on the Network Cost Function -- 4.5. References -- 4.6. Problems -- Chapter 5 The ATM Switch Model -- 5.1. The Switch Model -- 5.2. ATM Switch Taxonomy -- 5.3. References -- Chapter 6 ATM Switching with Minimum-Depth Blocking Networks -- 6.1. Unbuffered Networks -- 6.1.1. Crossbar and basic banyan networks -- 6.1.1.1. Basic structures -- 6.1.1.2. Performance -- 6.1.2. Enhanced banyan networks -- 6.1.2.1. Structures -- 6.1.2.2. Performance -- 6.2. Networks with a Single Plane and Internal Queueing -- 6.2.1. Input queueing -- 6.2.2. Output queueing -- 6.2.3. Shared queueing -- 6.2.4. Performance -- 6.3. Networks with Unbuffered Parallel Switching Planes -- 6.3.1. Basic architectures -- 6.3.2. Architectures with output queueing -- 6.3.2.1. Specific architectures -- 6.3.2.2. Performance -- 6.3.3. Architectures with combined input-output queueing -- 6.3.3.1. Models for performance analysis -- 6.3.3.2. Performance results -- 6.4. Additional Remarks -- 6.5. References -- 6.6. Problems -- Chapter 7 ATM Switching with Non-Blocking Single-Queueing Networks -- 7.1. Input Queueing -- 7.1.1. Basic architectures -- 7.1.1.1. The Three-Phase switch -- 7.1.1.2. The Ring-Reservation switch -- 7.1.2. Performance analysis -- 7.1.2.1. Asymptotic throughput -- 7.1.2.2. Packet delay -- 7.1.2.3. Packet loss probability -- 7.1.3. Enhanced architectures -- 7.1.3.1. Architecture with channel grouping -- 7.1.3.2. Architecture with windowing -- 7.2. Output Queueing -- 7.2.1. Basic architectures -- 7.2.2. Performance analysis -- 7.3. Shared Queueing -- 7.3.1. Basic architectures -- 7.3.2. Performance analysis -- 7.4. Performance Comparison of Different Queueings -- 7.5. Additional Remarks -- 7.6. References -- 7.7. Problems -- Chapter 8 ATM Switching with Non-Blocking Multiple-Queueing Networks -- 8.1. Combined Input-Output Queueing -- 8.1.1. Basic architectures -- 8.1.1.1. Internal queue loss -- 8.1.1.2. Internal backpressure -- 8.1.2. Performance analysis -- 8.1.2.1. Constrained output queue capacity -- 8.1.2.2. Arbitrary input and output queue capacities -- 8.1.3. Architectures with parallel switching planes -- 8.2. Combined Shared-Output Queueing -- 8.2.1. Basic architecture -- 8.2.2. Performance analysis -- 8.3. Combined Input-Shared Queueing -- 8.3.1. Basic architectures -- 8.3.2. Performance analysis -- 8.4. Comparison of Switch Capacities in Non-blocking Switches -- 8.5. Additional Remarks -- 8.6. References -- 8.7. Problems -- Chapter 9 ATM Switching with Arbitrary-Depth Blocking Networks -- 9.1. Switch Architectures Based on Deflection Routing -- 9.1.1. The Shuffleout switch -- 9.1.2. The Shuffle Self-Routing switch -- 9.1.3. The Rerouting switch -- 9.1.4. The Dual Shuffle switch -- 9.2. Switch Architectures Based on Simpler SEs -- 9.2.1. Previous Architectures with SEs -- 9.2.2. The Tandem Banyan switch -- 9.3. Architecture Enhancements -- 9.3.1. Extended routing -- 9.3.2. Interstage bridging -- 9.4. Performance Evaluation and Comparison -- 9.4.1. The Shuffleout switch -- 9.4.1.1. Network with 2 X 4 SEs -- 9.4.1.2. Network with 2 X 2 SEs -- 9.4.1.3. Network performance -- 9.4.2. The Shuffle Self-Routing switch -- 9.4.2.1. Basic network with 2 X 4 SEs -- 9.4.2.2. Basic network with 2 X 2 SEs -- 9.4.2.3. Basic network performance -- 9.4.2.4. Network with extended routing and 2 X 4 SEs -- 9.4.2.5. Network with extended routing and 2 X 2 SEs -- 9.4.2.6. Network performance with extended routing -- 9.4.3. The Rerouting switch -- 9.4.4. The Dual Shuffle switch -- 9.4.5. The Tandem Banyan switch -- 9.4.6. Interconnection network performance comparison -- 9.4.7. Overall switch performance -- 9.5. Switch Architectures with Parallel Switching Planes -- 9.6. Additional Remarks -- 9.7. References -- 9.8. Problems -- Appendix Synchronous Queues -- A.1 Synchronous Single-server Queues -- A.1.1. The M/D/I queue -- A.1.1.1. The asynchronous M/G/1 queue -- A.1.1.2. The asynchronous M/D/1 queue -- A.1.1.3. The synchronous M/D/1 queue -- A.1.2. The Geom (N)/D/1 queue -- A.1.3. The Geom/G/1 queue -- A.1.4. The Geom/G/1/B queue -- A.2. Synchronous Multiple-server Queues -- A.2.1. The M/D/C queue -- A.2.2. The Geom(N)/D/C/B queue -- A.3. References -- Index. 330 $aReflecting the developments in the integrated transport of heterogenous kinds of communication services, this book provides an account of the switching for broadband ATM networks by covering three different areas: the theory of switching; the architecture of ATM switching fabrics; and the performance of the ATM switching fabrics.; The book combines the analysis of ATM theory, architecture and performance and presents the analytical models available to evaluate the traffic performance of ATM switches under random traffic, together with a wide set of results on the traffic performance of each single ATM switch architecture. 606 $aAsynchronous transfer mode 606 $aBroadband communication systems 606 $aCommunication technology 606 $aComputer network architectures 606 $aSwitching theory 615 0$aAsynchronous transfer mode. 615 0$aBroadband communication systems. 615 0$aCommunication technology. 615 0$aComputer network architectures. 615 0$aSwitching theory. 676 $a621.3815372 700 $aPattavina$b Achille$067393 801 0$bPQKB 906 $aBOOK 912 $a9911019226403321 996 $aSwitching Theory, Architectures and Performance in Broadband ATM Networks: Architectures and Performance in Broadband ATM Networks$94419401 997 $aUNINA